commit 21a4ab8318ba6f049aac244e237cd1557586e216
author Peter Maydell <peter.maydell@linaro.org> Fri May 12 15:43:37 2023 +0100
committer Peter Maydell <peter.maydell@linaro.org> Fri May 12 15:43:37 2023 +0100
tree 0e72b2aa8d7555e9e4986f766f1648fa2d6b3059
parent 67ce09b5443caf310649b5b003efe5b0d69e81a1

target/arm: Don't allow stage 2 page table walks to downgrade to NS

Bit 63 in a Table descriptor is only the NSTable bit for stage 1
translations; in stage 2 it is RES0.  We were incorrectly looking at
it all the time.

This causes problems if:
 * the stage 2 table descriptor was incorrectly setting the RES0 bit
 * we are doing a stage 2 translation in Secure address space for
   a NonSecure stage 1 regime -- in this case we would incorrectly
   do an immediate downgrade to NonSecure

A bug elsewhere in the code currently prevents us from getting
to the second situation, but when we fix that it will be possible.

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230504135425.2748672-2-peter.maydell@linaro.org