| commit | fbf43c7dbf18156d4dce73183dd17b83f6ca65fc | [log] [tgz] |
|---|---|---|
| author | Yifei Jiang <jiangyifei@huawei.com> | Wed Jan 12 16:13:29 2022 +0800 |
| committer | Alistair Francis <alistair.francis@wdc.com> | Fri Jan 21 15:52:56 2022 +1000 |
| tree | 164eee781d3feea1c6d0d6569d04c520144e1c9f | |
| parent | 1eb9a5da31abb0a7b613756f5bb7c887b7ef60ea [diff] |
target/riscv: enable riscv kvm accel Add riscv kvm support in meson.build file. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Mingwang Li <limingwang@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Message-id: 20220112081329.1835-14-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>