)]}'
{
  "commit": "fbda88f7abdeed3ceebdd18de6909a52df756c1c",
  "tree": "1a2e29eb8df6468a97fbc67d03c19644e3033ef1",
  "parents": [
    "5260ecffd24e36c029849f379c8b9cc3d099c879"
  ],
  "author": {
    "name": "Nicholas Piggin",
    "email": "npiggin@gmail.com",
    "time": "Mon May 15 19:26:47 2023 +1000"
  },
  "committer": {
    "name": "Daniel Henrique Barboza",
    "email": "danielhb413@gmail.com",
    "time": "Sat May 27 08:25:19 2023 -0300"
  },
  "message": "target/ppc: Fix width of some 32-bit SPRs\n\nSome 32-bit SPRs are incorrectly implemented as 64-bits on 64-bit\ntargets.\n\nThis changes VRSAVE, DSISR, HDSISR, DAWRX0, PIDR, LPIDR, DEXCR,\nHDEXCR, CTRL, TSCR, MMCRH, and PMC[1-6] from to be 32-bit registers.\n\nThis only goes by the 32/64 classification in the architecture, it\ndoes not try to implement finer details of SPR implementation (e.g.,\nnot all bits implemented as simple read/write storage).\n\nSigned-off-by: Nicholas Piggin \u003cnpiggin@gmail.com\u003e\nReviewed-by: Harsh Prateek Bora \u003charshpb@linux.ibm.com\u003e\nMessage-Id: \u003c20230515092655.171206-2-npiggin@gmail.com\u003e\nSigned-off-by: Daniel Henrique Barboza \u003cdanielhb413@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0ce2e3c91d99fb0035e9c516522ed00319146013",
      "old_mode": 33188,
      "old_path": "target/ppc/cpu_init.c",
      "new_id": "5aa0b3f0f17b4e483c54d6651eb4fffa0a1998de",
      "new_mode": 33188,
      "new_path": "target/ppc/cpu_init.c"
    },
    {
      "type": "modify",
      "old_id": "779e7db513436ed163e9f354cc42ba604c6fc0a6",
      "old_mode": 33188,
      "old_path": "target/ppc/helper_regs.c",
      "new_id": "fb351c303fb667c11493fcde8b130987a927f3bb",
      "new_mode": 33188,
      "new_path": "target/ppc/helper_regs.c"
    },
    {
      "type": "modify",
      "old_id": "a9bc1522e24ec24a99c434c35365f1edcc8a5fe8",
      "old_mode": 33188,
      "old_path": "target/ppc/misc_helper.c",
      "new_id": "40ddc5c08c6a51fed1b7e5b5cf92d631eefad8d0",
      "new_mode": 33188,
      "new_path": "target/ppc/misc_helper.c"
    },
    {
      "type": "modify",
      "old_id": "1381072b9e546e4497b0e3d65612c8ac468f0ad8",
      "old_mode": 33188,
      "old_path": "target/ppc/power8-pmu.c",
      "new_id": "64a64865d728b56e4885b1e0c0dc32f434670ef2",
      "new_mode": 33188,
      "new_path": "target/ppc/power8-pmu.c"
    },
    {
      "type": "modify",
      "old_id": "8437eb03401cc708397ac2af57b22f5d3ba45dd7",
      "old_mode": 33188,
      "old_path": "target/ppc/spr_common.h",
      "new_id": "4c0f2bed77c7cb1eaa5dca941647bd08af93a99a",
      "new_mode": 33188,
      "new_path": "target/ppc/spr_common.h"
    },
    {
      "type": "modify",
      "old_id": "1720570b9bf7011459c7205235ff6650d964236d",
      "old_mode": 33188,
      "old_path": "target/ppc/translate.c",
      "new_id": "9b7884586c2bf830eb42a90f5ba0378a91f9660e",
      "new_mode": 33188,
      "new_path": "target/ppc/translate.c"
    }
  ]
}
