target-mips: Avoid shifting left into sign bit
Add U suffix to various places where we shift a 1 left by 31,
to avoid undefined behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 3ba3229..6c2014e 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -775,7 +775,7 @@
and disable the MIPS IV extensions to the MIPS III ISA.
Some other MIPS IV CPUs ignore the bit, so the check here
would be too restrictive for them. */
- if (env->CP0_Status & (1 << CP0St_CU3)) {
+ if (env->CP0_Status & (1U << CP0St_CU3)) {
env->hflags |= MIPS_HFLAG_COP1X;
}
}