)]}'
{
  "commit": "efdb43b831efa5e0c8da3d062a1a37325b4a7708",
  "tree": "2d6152e7798f0428aa8e301aa786f6d147674522",
  "parents": [
    "549c9a9dcbc1592ea79496f7b3ab234f366adeba"
  ],
  "author": {
    "name": "Salil Mehta",
    "email": "salil.mehta@huawei.com",
    "time": "Tue Jul 16 12:15:00 2024 +0100"
  },
  "committer": {
    "name": "Michael S. Tsirkin",
    "email": "mst@redhat.com",
    "time": "Mon Jul 22 20:15:41 2024 -0400"
  },
  "message": "hw/acpi: Update CPUs AML with cpu-(ctrl)dev change\n\nCPUs Control device(\\\\_SB.PCI0) register interface for the x86 arch is IO port\nbased and existing CPUs AML code assumes _CRS objects would evaluate to a system\nresource which describes IO Port address. But on ARM arch CPUs control\ndevice(\\\\_SB.PRES) register interface is memory-mapped hence _CRS object should\nevaluate to system resource which describes memory-mapped base address. Update\nbuild CPUs AML function to accept both IO/MEMORY region spaces and accordingly\nupdate the _CRS object.\n\nCo-developed-by: Keqian Zhu \u003czhukeqian1@huawei.com\u003e\nSigned-off-by: Keqian Zhu \u003czhukeqian1@huawei.com\u003e\nSigned-off-by: Salil Mehta \u003csalil.mehta@huawei.com\u003e\nReviewed-by: Gavin Shan \u003cgshan@redhat.com\u003e\nTested-by: Vishnu Pajjuri \u003cvishnu@os.amperecomputing.com\u003e\nReviewed-by: Jonathan Cameron \u003cJonathan.Cameron@huawei.com\u003e\nTested-by: Xianglai Li \u003clixianglai@loongson.cn\u003e\nTested-by: Miguel Luis \u003cmiguel.luis@oracle.com\u003e\nReviewed-by: Shaoqin Huang \u003cshahuang@redhat.com\u003e\nTested-by: Zhao Liu \u003czhao1.liu@intel.com\u003e\nReviewed-by: Igor Mammedov \u003cimammedo@redhat.com\u003e\nMessage-Id: \u003c20240716111502.202344-6-salil.mehta@huawei.com\u003e\nReviewed-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cf5e9183e4a3d00045b43e1895185ca7f5269a09",
      "old_mode": 33188,
      "old_path": "hw/acpi/cpu.c",
      "new_id": "5cb60ca8bc773672d135a6398379578357b05b72",
      "new_mode": 33188,
      "new_path": "hw/acpi/cpu.c"
    },
    {
      "type": "modify",
      "old_id": "f4e366f64fa0e64ce9f74046e6ee71b409005b15",
      "old_mode": 33188,
      "old_path": "hw/i386/acpi-build.c",
      "new_id": "5d4bd2b7106ff4acbcd39f67f0830a02b77e4074",
      "new_mode": 33188,
      "new_path": "hw/i386/acpi-build.c"
    },
    {
      "type": "modify",
      "old_id": "df87b15997796eb6e334869a0b14681733168f9c",
      "old_mode": 33188,
      "old_path": "include/hw/acpi/cpu.h",
      "new_id": "32654dc274fd93c0dee5f9fe3e733c1ee53e4312",
      "new_mode": 33188,
      "new_path": "include/hw/acpi/cpu.h"
    }
  ]
}