tree 7f246e0d00c0cc17feceea240db21005570efd30
parent 05ad1440b8428b0ade9b8e5c01469adb8fbf83e3
author Cédric Le Goater <clg@redhat.com> 1715091132 +0200
committer Cédric Le Goater <clg@redhat.com> 1718564934 +0200

aspeed/smc: Reintroduce "dram-base" property for AST2700

The Aspeed SMC device model use to have a 'sdram_base' property. It
was removed by commit d177892d4a48 ("aspeed/smc: Remove unused
"sdram-base" property") because previous changes simplified the DMA
transaction model to use an offset in RAM and not the physical
address.

The AST2700 SoC has larger address space (64-bit) and a new register
DMA DRAM Side Address High Part (0x7C) is introduced to deal with the
high bits of the DMA address. To be able to compute the offset of the
DMA transaction, as done on the other SoCs, we will need to know where
the DRAM is mapped in the address space. Re-introduce a "dram-base"
property to hold this value.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>