commit eddf68a6ac4b5ca6eb1efbb69e50d04878a87aa5
author j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 05 07:22:49 2007 +0000
committer j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 05 07:22:49 2007 +0000
tree cb9274a4ae66c75bf7f7a6eee973e08ebfcc611e
parent 7a3148a955e3350720a01f57163ab230b72aca7e

Integrate Alpha target in Qemu core.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2601 c046a42c-6fe2-441c-8c8c-71466251a162

dis-asm.h

diff --git a/dis-asm.h b/dis-asm.h
index 73b4380..2b2f1d1 100644
--- a/dis-asm.h
+++ b/dis-asm.h
@@ -181,6 +181,7 @@
 #define bfd_mach_sh4al_dsp  0x4d
 #define bfd_mach_sh5        0x50
   bfd_arch_alpha,      /* Dec Alpha */
+#define bfd_mach_alpha 1
   bfd_arch_arm,        /* Advanced Risc Machines ARM */
 #define bfd_mach_arm_2         1
 #define bfd_mach_arm_2a                2
@@ -377,6 +378,7 @@
 extern int print_insn_v850		PARAMS ((bfd_vma, disassemble_info*));
 extern int print_insn_tic30		PARAMS ((bfd_vma, disassemble_info*));
 extern int print_insn_ppc		PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_alpha             PARAMS ((bfd_vma, disassemble_info*));
 
 #if 0
 /* Fetch the disassembler for a given BFD, if that support is available.  */