Merge tag 'pull-lu-20230809' of https://gitlab.com/rth7680/qemu into staging
linux-user: Fixes for mmap syscall emulation
linux-user: Correctly detect access to /proc in openat
util/interval-tree: Check root for null in interval_tree_iter_first
tests/tcg: Disable filename test for info proc mappings
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# gpg: Signature made Wed 09 Aug 2023 10:46:22 AM PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-lu-20230809' of https://gitlab.com/rth7680/qemu:
linux-user: Fix openat() emulation to correctly detect accesses to /proc
util/interval-tree: Check root for null in interval_tree_iter_first
tests/tcg: Disable filename test for info proc mappings
linux-user: Use ARRAY_SIZE with bitmask_transtbl
linux-user: Split out do_mmap
qemu/osdep: Remove fallback for MAP_FIXED_NOREPLACE
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst
index 2a3af26..4ea957b 100644
--- a/docs/system/devices/nvme.rst
+++ b/docs/system/devices/nvme.rst
@@ -271,9 +271,15 @@
``pil=UINT8`` (default: ``0``)
Controls the location of the protection information within the metadata. Set
- to ``1`` to transfer protection information as the first eight bytes of
- metadata. Otherwise, the protection information is transferred as the last
- eight bytes.
+ to ``1`` to transfer protection information as the first bytes of metadata.
+ Otherwise, the protection information is transferred as the last bytes of
+ metadata.
+
+``pif=UINT8`` (default: ``0``)
+ By default, the namespace device uses 16 bit guard protection information
+ format (``pif=0``). Set to ``2`` to enable 64 bit guard protection
+ information format. This requires at least 16 bytes of metadata. Note that
+ ``pif=1`` (32 bit guards) is currently not supported.
Virtualization Enhancements and SR-IOV (Experimental Support)
-------------------------------------------------------------
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index d217ae9..539d273 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -4361,7 +4361,13 @@
uint32_t npid = (cdw10 >> 1) + 1;
unsigned int i = 0;
g_autofree uint16_t *pids = NULL;
- uint32_t maxnpid = n->subsys->endgrp.fdp.nrg * n->subsys->endgrp.fdp.nruh;
+ uint32_t maxnpid;
+
+ if (!ns->endgrp || !ns->endgrp->fdp.enabled) {
+ return NVME_FDP_DISABLED | NVME_DNR;
+ }
+
+ maxnpid = n->subsys->endgrp.fdp.nrg * n->subsys->endgrp.fdp.nruh;
if (unlikely(npid >= MIN(NVME_FDP_MAXPIDS, maxnpid))) {
return NVME_INVALID_FIELD | NVME_DNR;
@@ -6900,7 +6906,7 @@
case NVME_DIRECTIVE_IDENTIFY:
switch (doper) {
case NVME_DIRECTIVE_RETURN_PARAMS:
- if (ns->endgrp->fdp.enabled) {
+ if (ns->endgrp && ns->endgrp->fdp.enabled) {
id.supported |= 1 << NVME_DIRECTIVE_DATA_PLACEMENT;
id.enabled |= 1 << NVME_DIRECTIVE_DATA_PLACEMENT;
id.persistent |= 1 << NVME_DIRECTIVE_DATA_PLACEMENT;
diff --git a/hw/nvme/dif.c b/hw/nvme/dif.c
index 63c44c8..01b19c3 100644
--- a/hw/nvme/dif.c
+++ b/hw/nvme/dif.c
@@ -115,7 +115,7 @@
uint64_t crc = crc64_nvme(~0ULL, buf, ns->lbasz);
if (pil) {
- crc = crc64_nvme(crc, mbuf, pil);
+ crc = crc64_nvme(~crc, mbuf, pil);
}
dif->g64.guard = cpu_to_be64(crc);
@@ -246,7 +246,7 @@
uint64_t crc = crc64_nvme(~0ULL, buf, ns->lbasz);
if (pil) {
- crc = crc64_nvme(crc, mbuf, pil);
+ crc = crc64_nvme(~crc, mbuf, pil);
}
trace_pci_nvme_dif_prchk_guard_crc64(be64_to_cpu(dif->g64.guard), crc);
