tree ad04e8c0fe42b2fe0e7d157897a592a1da77d797
parent 34d94b7af9f1dc4cae550ecc7b825c9567741a12
author Jinjie Ruan <ruanjinjie@huawei.com> 1713533581 +0100
committer Peter Maydell <peter.maydell@linaro.org> 1714036865 +0100

target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64()

According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
with superpriority is always IRQ, never FIQ, so the NMI exception trap entry
behave like IRQ. And VINMI(vIRQ with Superpriority) can be raised from the
GIC or come from the hcrx_el2.HCRX_VINMI bit, VFNMI(vFIQ with Superpriority)
come from the hcrx_el2.HCRX_VFNMI bit.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240407081733.3231820-13-ruanjinjie@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>