commit | 5454006a7cc6caf10c1816e6828b75a40fbcc16e | [log] [tgz] |
---|---|---|
author | Peter Maydell <peter.maydell@linaro.org> | Fri Jan 20 11:15:09 2017 +0000 |
committer | Peter Maydell <peter.maydell@linaro.org> | Fri Jan 20 11:15:09 2017 +0000 |
tree | f949eacfd3e98d6b55211069d1b079b4ca52543b | |
parent | aa1b3111b3f3c53b9290ecade02f31acfc579c16 [diff] |
hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU Wire the new VIRQ, VFIQ and maintenance interrupt lines from the GIC to each CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-5-git-send-email-peter.maydell@linaro.org