commit e397ee3382a34c65b0fb93514c3eef5c31715d3c
author ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Fri Mar 23 00:43:28 2007 +0000
committer ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Fri Mar 23 00:43:28 2007 +0000
tree cd0afd9013624ab292d6a54998e4b1e2cf727390
parent 51789c410beb34423b1188a6b6e069fe8b68aebe

Fix enough FPU/R2 support to get 24Kf going.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/op.c

diff --git a/target-mips/op.c b/target-mips/op.c
index a286cef..f97ec42 100644
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -1180,6 +1180,18 @@
     RETURN();
 }
 
+void op_mfc0_config6 (void)
+{
+    T0 = env->CP0_Config6;
+    RETURN();
+}
+
+void op_mfc0_config7 (void)
+{
+    T0 = env->CP0_Config7;
+    RETURN();
+}
+
 void op_mfc0_lladdr (void)
 {
     T0 = (int32_t)env->CP0_LLAddr >> 4;
@@ -1653,7 +1665,7 @@
 void op_cp1_enabled(void)
 {
     if (!(env->CP0_Status & (1 << CP0St_CU1))) {
-        CALL_FROM_TB2(do_raise_exception_err, EXCP_CpU, 1);
+        CALL_FROM_TB2(do_raise_exception_direct_err, EXCP_CpU, 1);
     }
     RETURN();
 }