Merge tag 'sdmmc-20240716' of https://github.com/philmd/qemu into staging
SD/MMC patches queue
Addition of eMMC support is a long-term collaborative virtual work by:
- Cédric Le Goater
- Edgar E. Iglesias
- Francisco Iglesias
- Joel Stanley
- Luc Michel
- Philippe Mathieu-Daudé
- Sai Pavan Boddu
- Vincent Palatin
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# gpg: Signature made Wed 17 Jul 2024 04:39:13 AM AEST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'sdmmc-20240716' of https://github.com/philmd/qemu:
hw/sd/sdcard: Support boot area in emmc image
hw/sd/sdcard: Add mmc SWITCH function support (CMD6)
hw/sd/sdcard: Add eMMC 'boot-partition-size' property
hw/sd/sdcard: Add emmc_cmd_SEND_EXT_CSD handler (CMD8)
hw/sd/sdcard: Implement eMMC sleep state (CMD5)
hw/sd/sdcard: Add emmc_cmd_PROGRAM_CID handler (CMD26)
hw/sd/sdcard: Fix SET_BLOCK_COUNT command argument on eMMC (CMD23)
hw/sd/sdcard: Add emmc_cmd_SET_RELATIVE_ADDR handler (CMD3)
hw/sd/sdcard: Register unimplemented command handlers
hw/sd/sdcard: Register generic command handlers
hw/sd/sdcard: Basis for eMMC support
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index d6a07f0..07cb97d 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -2,6 +2,8 @@
* SD Memory Card emulation as defined in the "SD Memory Card Physical
* layer specification, Version 2.00."
*
+ * eMMC emulation defined in "JEDEC Standard No. 84-A43"
+ *
* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
* Copyright (c) 2007 CodeSourcery
* Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
@@ -122,11 +124,20 @@
uint16_t rca;
uint32_t card_status;
uint8_t sd_status[64];
+ union {
+ uint8_t ext_csd[512];
+ struct {
+ uint8_t ext_csd_rw[192]; /* Modes segment */
+ uint8_t ext_csd_ro[320]; /* Properties segment */
+ };
+ };
/* Static properties */
uint8_t spec_version;
+ uint64_t boot_part_size;
BlockBackend *blk;
+ uint8_t boot_config;
const SDProto *proto;
@@ -169,12 +180,18 @@
static void sd_realize(DeviceState *dev, Error **errp);
static const SDProto sd_proto_spi;
+static const SDProto sd_proto_emmc;
static bool sd_is_spi(SDState *sd)
{
return sd->proto == &sd_proto_spi;
}
+static bool sd_is_emmc(SDState *sd)
+{
+ return sd->proto == &sd_proto_emmc;
+}
+
static const char *sd_version_str(enum SDPhySpecificationVersion version)
{
static const char *sdphy_version[] = {
@@ -438,6 +455,23 @@
sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
}
+static void emmc_set_cid(SDState *sd)
+{
+ sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
+ sd->cid[1] = 0b01; /* CBX: soldered BGA */
+ sd->cid[2] = OID[0]; /* OEM/Application ID (OID) */
+ sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
+ sd->cid[4] = PNM[1];
+ sd->cid[5] = PNM[2];
+ sd->cid[6] = PNM[3];
+ sd->cid[7] = PNM[4];
+ sd->cid[8] = PNM[4];
+ sd->cid[9] = PRV; /* Fake product revision (PRV) */
+ stl_be_p(&sd->cid[10], 0xdeadbeef); /* Fake serial number (PSN) */
+ sd->cid[14] = (MDT_MON << 4) | (MDT_YR - 1997); /* Manufacture date (MDT) */
+ sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
+}
+
/* Card-Specific Data register */
#define HWBLOCK_SHIFT 9 /* 512 bytes */
@@ -451,6 +485,79 @@
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
};
+static void emmc_set_ext_csd(SDState *sd, uint64_t size)
+{
+ uint32_t sectcount = size >> HWBLOCK_SHIFT;
+
+ memset(sd->ext_csd, 0, sizeof(sd->ext_csd)); /* FIXME only RW at reset */
+
+ /* Properties segment (RO) */
+ sd->ext_csd[EXT_CSD_S_CMD_SET] = 0b1; /* supported command sets */
+ sd->ext_csd[EXT_CSD_BOOT_INFO] = 0x0; /* Boot information */
+ /* Boot partition size. 128KB unit */
+ sd->ext_csd[EXT_CSD_BOOT_MULT] = sd->boot_part_size / (128 * KiB);
+ sd->ext_csd[EXT_CSD_ACC_SIZE] = 0x1; /* Access size */
+ sd->ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] = 0x01; /* HC Erase unit size */
+ sd->ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] = 0x01; /* HC erase timeout */
+ sd->ext_csd[EXT_CSD_REL_WR_SEC_C] = 0x1; /* Reliable write sector count */
+ sd->ext_csd[EXT_CSD_HC_WP_GRP_SIZE] = 0x01; /* HC write protect group size */
+ sd->ext_csd[EXT_CSD_S_C_VCC] = 0x01; /* Sleep current VCC */
+ sd->ext_csd[EXT_CSD_S_C_VCCQ] = 0x01; /* Sleep current VCCQ */
+ sd->ext_csd[EXT_CSD_S_A_TIMEOUT] = 0x01; /* Sleep/Awake timeout */
+ stl_le_p(&sd->ext_csd[EXT_CSD_SEC_CNT], sectcount); /* Sector count */
+ sd->ext_csd[210] = 0x46; /* Min write perf for 8bit@52Mhz */
+ sd->ext_csd[209] = 0x46; /* Min read perf for 8bit@52Mhz */
+ sd->ext_csd[208] = 0x46; /* Min write perf for 4bit@52Mhz */
+ sd->ext_csd[207] = 0x46; /* Min read perf for 4bit@52Mhz */
+ sd->ext_csd[206] = 0x46; /* Min write perf for 4bit@26Mhz */
+ sd->ext_csd[205] = 0x46; /* Min read perf for 4bit@26Mhz */
+ sd->ext_csd[EXT_CSD_CARD_TYPE] = 0b11;
+ sd->ext_csd[EXT_CSD_STRUCTURE] = 2;
+ sd->ext_csd[EXT_CSD_REV] = 3;
+
+ /* Mode segment (RW) */
+ sd->ext_csd[EXT_CSD_PART_CONFIG] = sd->boot_config;
+}
+
+static void emmc_set_csd(SDState *sd, uint64_t size)
+{
+ int hwblock_shift = HWBLOCK_SHIFT;
+ uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
+ uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
+
+ sd->csd[0] = (3 << 6) | (4 << 2); /* Spec v4.3 with EXT_CSD */
+ sd->csd[1] = (1 << 3) | 6; /* Asynchronous data access time: 1ms */
+ sd->csd[2] = 0x00;
+ sd->csd[3] = (1 << 3) | 3;; /* Maximum bus clock frequency: 100MHz */
+ sd->csd[4] = 0x0f;
+ if (size <= 2 * GiB) {
+ /* use 1k blocks */
+ uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1;
+ sd->csd[5] = 0x5a;
+ sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf);
+ sd->csd[7] = (csize1k >> 2) & 0xff;
+ } else { /* >= 2GB : size stored in ext CSD, block addressing */
+ sd->csd[5] = 0x59;
+ sd->csd[6] = 0x8f;
+ sd->csd[7] = 0xff;
+ sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
+ }
+ sd->csd[8] = 0xff;
+ sd->csd[9] = 0xfc | /* Max. write current */
+ ((CMULT_SHIFT - 2) >> 1);
+ sd->csd[10] = 0x40 | /* Erase sector size */
+ (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
+ sd->csd[11] = 0x00 | /* Write protect group size */
+ ((sectsize << 7) & 0x80) | wpsize;
+ sd->csd[12] = 0x90 | /* Write speed factor */
+ (hwblock_shift >> 2);
+ sd->csd[13] = 0x20 | /* Max. write data block length */
+ ((hwblock_shift << 6) & 0xc0);
+ sd->csd[14] = 0x00;
+ sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
+ emmc_set_ext_csd(sd, size);
+}
+
static void sd_set_csd(SDState *sd, uint64_t size)
{
int hwblock_shift = HWBLOCK_SHIFT;
@@ -539,6 +646,7 @@
FIELD(CSR, AKE_SEQ_ERROR, 3, 1)
FIELD(CSR, APP_CMD, 5, 1)
FIELD(CSR, FX_EVENT, 6, 1)
+FIELD(CSR, SWITCH_ERROR, 7, 1)
FIELD(CSR, READY_FOR_DATA, 8, 1)
FIELD(CSR, CURRENT_STATE, 9, 4)
FIELD(CSR, ERASE_RESET, 13, 1)
@@ -659,6 +767,40 @@
return sd->blk_len;
}
+/*
+ * This requires a disk image that has two boot partitions inserted at the
+ * beginning of it. The size of the boot partitions is the "boot-size"
+ * property.
+ */
+static uint32_t sd_bootpart_offset(SDState *sd)
+{
+ bool partitions_enabled;
+ unsigned partition_access;
+
+ if (!sd->boot_part_size || !sd_is_emmc(sd)) {
+ return 0;
+ }
+
+ partitions_enabled = sd->ext_csd[EXT_CSD_PART_CONFIG]
+ & EXT_CSD_PART_CONFIG_EN_MASK;
+ if (!partitions_enabled) {
+ return 0;
+ }
+
+ partition_access = sd->ext_csd[EXT_CSD_PART_CONFIG]
+ & EXT_CSD_PART_CONFIG_ACC_MASK;
+ switch (partition_access) {
+ case EXT_CSD_PART_CONFIG_ACC_DEFAULT:
+ return sd->boot_part_size * 2;
+ case EXT_CSD_PART_CONFIG_ACC_BOOT0:
+ return 0;
+ case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1:
+ return sd->boot_part_size * 1;
+ default:
+ g_assert_not_reached();
+ }
+}
+
static uint64_t sd_req_get_address(SDState *sd, SDRequest req)
{
uint64_t addr;
@@ -691,13 +833,14 @@
sect = 0;
}
size = sect << HWBLOCK_SHIFT;
+ size -= sd_bootpart_offset(sd);
sect = sd_addr_to_wpnum(size) + 1;
sd->state = sd_idle_state;
/* card registers */
- sd->rca = 0x0000;
+ sd->rca = sd_is_emmc(sd) ? 0x0001 : 0x0000;
sd->size = size;
sd_set_ocr(sd);
sd_set_scr(sd);
@@ -784,6 +927,24 @@
},
};
+static bool vmstate_needed_for_emmc(void *opaque)
+{
+ SDState *sd = opaque;
+
+ return sd_is_emmc(sd);
+}
+
+static const VMStateDescription emmc_extcsd_vmstate = {
+ .name = "sd-card/ext_csd_modes-state",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = vmstate_needed_for_emmc,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT8_ARRAY(ext_csd_rw, SDState, 192),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
static int sd_vmstate_pre_load(void *opaque)
{
SDState *sd = opaque;
@@ -831,6 +992,7 @@
},
.subsections = (const VMStateDescription * const []) {
&sd_ocr_vmstate,
+ &emmc_extcsd_vmstate,
NULL
},
};
@@ -880,6 +1042,7 @@
static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
{
trace_sdcard_read_block(addr, len);
+ addr += sd_bootpart_offset(sd);
if (!sd->blk || blk_pread(sd->blk, addr, len, sd->data, 0) < 0) {
fprintf(stderr, "sd_blk_read: read error on host side\n");
}
@@ -888,6 +1051,7 @@
static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
{
trace_sdcard_write_block(addr, len);
+ addr += sd_bootpart_offset(sd);
if (!sd->blk || blk_pwrite(sd->blk, addr, len, sd->data, 0) < 0) {
fprintf(stderr, "sd_blk_write: write error on host side\n");
}
@@ -969,6 +1133,47 @@
return ret;
}
+enum ExtCsdAccessMode {
+ EXT_CSD_ACCESS_MODE_COMMAND_SET = 0,
+ EXT_CSD_ACCESS_MODE_SET_BITS = 1,
+ EXT_CSD_ACCESS_MODE_CLEAR_BITS = 2,
+ EXT_CSD_ACCESS_MODE_WRITE_BYTE = 3
+};
+
+static void emmc_function_switch(SDState *sd, uint32_t arg)
+{
+ uint8_t access = extract32(arg, 24, 2);
+ uint8_t index = extract32(arg, 16, 8);
+ uint8_t value = extract32(arg, 8, 8);
+ uint8_t b = sd->ext_csd[index];
+
+ trace_sdcard_switch(access, index, value, extract32(arg, 0, 2));
+
+ if (index >= 192) {
+ qemu_log_mask(LOG_GUEST_ERROR, "MMC switching illegal offset\n");
+ sd->card_status |= R_CSR_SWITCH_ERROR_MASK;
+ return;
+ }
+
+ switch (access) {
+ case EXT_CSD_ACCESS_MODE_COMMAND_SET:
+ qemu_log_mask(LOG_UNIMP, "MMC Command set switching not supported\n");
+ return;
+ case EXT_CSD_ACCESS_MODE_SET_BITS:
+ b |= value;
+ break;
+ case EXT_CSD_ACCESS_MODE_CLEAR_BITS:
+ b &= ~value;
+ break;
+ case EXT_CSD_ACCESS_MODE_WRITE_BYTE:
+ b = value;
+ break;
+ }
+
+ trace_sdcard_ext_csd_update(index, sd->ext_csd[index], b);
+ sd->ext_csd[index] = b;
+}
+
static void sd_function_switch(SDState *sd, uint32_t arg)
{
int i, mode, new_func;
@@ -1173,8 +1378,19 @@
/* CMD0 */
static sd_rsp_type_t sd_cmd_GO_IDLE_STATE(SDState *sd, SDRequest req)
{
- sd->state = sd_idle_state;
- sd_reset(DEVICE(sd));
+ if (sd->state == sd_sleep_state) {
+ switch (req.arg) {
+ case 0x00000000:
+ case 0xf0f0f0f0:
+ break;
+ default:
+ return sd_r0;
+ }
+ }
+ if (sd->state != sd_inactive_state) {
+ sd->state = sd_idle_state;
+ sd_reset(DEVICE(sd));
+ }
return sd_is_spi(sd) ? sd_r1 : sd_r0;
}
@@ -1217,6 +1433,44 @@
}
}
+static sd_rsp_type_t emmc_cmd_SET_RELATIVE_ADDR(SDState *sd, SDRequest req)
+{
+ switch (sd->state) {
+ case sd_identification_state:
+ case sd_standby_state:
+ sd->state = sd_standby_state;
+ sd_set_rca(sd, req.arg >> 16);
+ return sd_r1;
+
+ default:
+ return sd_invalid_state_for_cmd(sd, req);
+ }
+}
+
+/* CMD5 */
+static sd_rsp_type_t emmc_cmd_sleep_awake(SDState *sd, SDRequest req)
+{
+ bool do_sleep = extract32(req.arg, 15, 1);
+
+ switch (sd->state) {
+ case sd_sleep_state:
+ if (!do_sleep) {
+ /* Awake */
+ sd->state = sd_standby_state;
+ }
+ return sd_r1b;
+
+ case sd_standby_state:
+ if (do_sleep) {
+ sd->state = sd_sleep_state;
+ }
+ return sd_r1b;
+
+ default:
+ return sd_invalid_state_for_cmd(sd, req);
+ }
+}
+
/* CMD6 */
static sd_rsp_type_t sd_cmd_SWITCH_FUNCTION(SDState *sd, SDRequest req)
{
@@ -1231,6 +1485,19 @@
return sd_cmd_to_sendingdata(sd, req, 0, NULL, 64);
}
+static sd_rsp_type_t emmc_cmd_SWITCH(SDState *sd, SDRequest req)
+{
+ switch (sd->state) {
+ case sd_transfer_state:
+ sd->state = sd_programming_state;
+ emmc_function_switch(sd, req.arg);
+ sd->state = sd_transfer_state;
+ return sd_r1b;
+ default:
+ return sd_invalid_state_for_cmd(sd, req);
+ }
+}
+
/* CMD7 */
static sd_rsp_type_t sd_cmd_DE_SELECT_CARD(SDState *sd, SDRequest req)
{
@@ -1293,6 +1560,17 @@
return sd_r7;
}
+/* CMD8 */
+static sd_rsp_type_t emmc_cmd_SEND_EXT_CSD(SDState *sd, SDRequest req)
+{
+ if (sd->state != sd_transfer_state) {
+ return sd_invalid_state_for_cmd(sd, req);
+ }
+
+ return sd_cmd_to_sendingdata(sd, req, sd_req_get_address(sd, req),
+ sd->ext_csd, sizeof(sd->ext_csd));
+}
+
/* CMD9 */
static sd_rsp_type_t spi_cmd_SEND_CSD(SDState *sd, SDRequest req)
{
@@ -1456,6 +1734,9 @@
}
sd->multi_blk_cnt = req.arg;
+ if (sd_is_emmc(sd)) {
+ sd->multi_blk_cnt &= 0xffff;
+ }
trace_sdcard_set_block_count(sd->multi_blk_cnt);
return sd_r1;
@@ -1488,6 +1769,12 @@
return sd_cmd_to_receivingdata(sd, req, addr, sd->blk_len);
}
+/* CMD26 */
+static sd_rsp_type_t emmc_cmd_PROGRAM_CID(SDState *sd, SDRequest req)
+{
+ return sd_cmd_to_receivingdata(sd, req, 0, sizeof(sd->cid));
+}
+
/* CMD27 */
static sd_rsp_type_t sd_cmd_PROGRAM_CSD(SDState *sd, SDRequest req)
{
@@ -1610,6 +1897,7 @@
case sd_ready_state:
case sd_identification_state:
case sd_inactive_state:
+ case sd_sleep_state:
return sd_invalid_state_for_cmd(sd, req);
case sd_idle_state:
if (!sd_is_spi(sd) && sd_req_get_rca(sd, req) != 0x0000) {
@@ -1837,9 +2125,6 @@
}
break;
- case 26: /* CMD26: PROGRAM_CID */
- return sd_cmd_to_receivingdata(sd, req, 0, sizeof(sd->cid));
-
default:
qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
return sd_illegal;
@@ -1935,6 +2220,12 @@
req->cmd &= 0x3f;
}
+ if (sd->state == sd_sleep_state && req->cmd) {
+ qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is sleeping\n");
+ rtype = sd_r0;
+ goto send_response;
+ }
+
if (sd->card_status & CARD_IS_LOCKED) {
if (!cmd_valid_while_locked(sd, req->cmd)) {
sd->card_status |= ILLEGAL_COMMAND;
@@ -2209,6 +2500,7 @@
sd->data_offset, sd->data_size, io_len);
switch (sd->current_cmd) {
case 6: /* CMD6: SWITCH_FUNCTION */
+ case 8: /* CMD8: SEND_EXT_CSD */
case 9: /* CMD9: SEND_CSD */
case 10: /* CMD10: SEND_CID */
case 13: /* ACMD13: SD_STATUS */
@@ -2375,6 +2667,50 @@
},
};
+static const SDProto sd_proto_emmc = {
+ /* Only v4.3 is supported */
+ .name = "eMMC",
+ .cmd = {
+ [0] = {0, sd_bc, "GO_IDLE_STATE", sd_cmd_GO_IDLE_STATE},
+ [1] = {0, sd_bcr, "SEND_OP_COND", sd_cmd_SEND_OP_COND},
+ [2] = {0, sd_bcr, "ALL_SEND_CID", sd_cmd_ALL_SEND_CID},
+ [3] = {0, sd_ac, "SET_RELATIVE_ADDR", emmc_cmd_SET_RELATIVE_ADDR},
+ [4] = {0, sd_bc, "SEND_DSR", sd_cmd_unimplemented},
+ [5] = {0, sd_ac, "SLEEP/AWAKE", emmc_cmd_sleep_awake},
+ [6] = {10, sd_adtc, "SWITCH", emmc_cmd_SWITCH},
+ [7] = {0, sd_ac, "(DE)SELECT_CARD", sd_cmd_DE_SELECT_CARD},
+ [8] = {0, sd_adtc, "SEND_EXT_CSD", emmc_cmd_SEND_EXT_CSD},
+ [9] = {0, sd_ac, "SEND_CSD", sd_cmd_SEND_CSD},
+ [10] = {0, sd_ac, "SEND_CID", sd_cmd_SEND_CID},
+ [11] = {1, sd_adtc, "READ_DAT_UNTIL_STOP", sd_cmd_unimplemented},
+ [12] = {0, sd_ac, "STOP_TRANSMISSION", sd_cmd_STOP_TRANSMISSION},
+ [13] = {0, sd_ac, "SEND_STATUS", sd_cmd_SEND_STATUS},
+ [14] = {0, sd_adtc, "BUSTEST_R", sd_cmd_unimplemented},
+ [15] = {0, sd_ac, "GO_INACTIVE_STATE", sd_cmd_GO_INACTIVE_STATE},
+ [16] = {2, sd_ac, "SET_BLOCKLEN", sd_cmd_SET_BLOCKLEN},
+ [17] = {2, sd_adtc, "READ_SINGLE_BLOCK", sd_cmd_READ_SINGLE_BLOCK},
+ [19] = {0, sd_adtc, "BUSTEST_W", sd_cmd_unimplemented},
+ [20] = {3, sd_adtc, "WRITE_DAT_UNTIL_STOP", sd_cmd_unimplemented},
+ [23] = {2, sd_ac, "SET_BLOCK_COUNT", sd_cmd_SET_BLOCK_COUNT},
+ [24] = {4, sd_adtc, "WRITE_SINGLE_BLOCK", sd_cmd_WRITE_SINGLE_BLOCK},
+ [26] = {4, sd_adtc, "PROGRAM_CID", emmc_cmd_PROGRAM_CID},
+ [27] = {4, sd_adtc, "PROGRAM_CSD", sd_cmd_PROGRAM_CSD},
+ [28] = {6, sd_ac, "SET_WRITE_PROT", sd_cmd_SET_WRITE_PROT},
+ [29] = {6, sd_ac, "CLR_WRITE_PROT", sd_cmd_CLR_WRITE_PROT},
+ [30] = {6, sd_adtc, "SEND_WRITE_PROT", sd_cmd_SEND_WRITE_PROT},
+ [31] = {6, sd_adtc, "SEND_WRITE_PROT_TYPE", sd_cmd_unimplemented},
+ [35] = {5, sd_ac, "ERASE_WR_BLK_START", sd_cmd_ERASE_WR_BLK_START},
+ [36] = {5, sd_ac, "ERASE_WR_BLK_END", sd_cmd_ERASE_WR_BLK_END},
+ [38] = {5, sd_ac, "ERASE", sd_cmd_ERASE},
+ [39] = {9, sd_ac, "FAST_IO", sd_cmd_unimplemented},
+ [40] = {9, sd_bcr, "GO_IRQ_STATE", sd_cmd_unimplemented},
+ [42] = {7, sd_adtc, "LOCK_UNLOCK", sd_cmd_LOCK_UNLOCK},
+ [49] = {0, sd_adtc, "SET_TIME", sd_cmd_unimplemented},
+ [55] = {8, sd_ac, "APP_CMD", sd_cmd_APP_CMD},
+ [56] = {8, sd_adtc, "GEN_CMD", sd_cmd_GEN_CMD},
+ },
+};
+
static void sd_instance_init(Object *obj)
{
SDState *sd = SDMMC_COMMON(obj);
@@ -2446,6 +2782,15 @@
}
}
+static void emmc_realize(DeviceState *dev, Error **errp)
+{
+ SDState *sd = SDMMC_COMMON(dev);
+
+ sd->spec_version = SD_PHY_SPECv3_01_VERS; /* Actually v4.3 */
+
+ sd_realize(dev, errp);
+}
+
static Property sdmmc_common_properties[] = {
DEFINE_PROP_DRIVE("drive", SDState, blk),
DEFINE_PROP_END_OF_LIST()
@@ -2457,6 +2802,12 @@
DEFINE_PROP_END_OF_LIST()
};
+static Property emmc_properties[] = {
+ DEFINE_PROP_UINT64("boot-partition-size", SDState, boot_part_size, 0),
+ DEFINE_PROP_UINT8("boot-config", SDState, boot_config, 0x0),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void sdmmc_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -2509,6 +2860,23 @@
sc->proto = &sd_proto_spi;
}
+static void emmc_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SDCardClass *sc = SDMMC_COMMON_CLASS(klass);
+
+ dc->desc = "eMMC";
+ dc->realize = emmc_realize;
+ device_class_set_props(dc, emmc_properties);
+ /* Reason: Soldered on board */
+ dc->user_creatable = false;
+
+ sc->proto = &sd_proto_emmc;
+
+ sc->set_cid = emmc_set_cid;
+ sc->set_csd = emmc_set_csd;
+}
+
static const TypeInfo sd_types[] = {
{
.name = TYPE_SDMMC_COMMON,
@@ -2530,6 +2898,11 @@
.parent = TYPE_SD_CARD,
.class_init = sd_spi_class_init,
},
+ {
+ .name = TYPE_EMMC,
+ .parent = TYPE_SDMMC_COMMON,
+ .class_init = emmc_class_init,
+ },
};
DEFINE_TYPES(sd_types)
diff --git a/hw/sd/trace-events b/hw/sd/trace-events
index 5dfe6be..43671dc 100644
--- a/hw/sd/trace-events
+++ b/hw/sd/trace-events
@@ -57,6 +57,8 @@
sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint8_t value) "%s %20s/ CMD%02d ofs %"PRIu32" value 0x%02x"
sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t offset, uint64_t size, uint32_t blklen) "%s %20s/ CMD%02d ofs %"PRIu32" size %"PRIu64" blklen %" PRIu32
sdcard_set_voltage(uint16_t millivolts) "%u mV"
+sdcard_ext_csd_update(unsigned index, uint8_t oval, uint8_t nval) "index %u: 0x%02x -> 0x%02x"
+sdcard_switch(unsigned access, unsigned index, unsigned value, unsigned set) "SWITCH acc:%u idx:%u val:%u set:%u"
# pxa2xx_mmci.c
pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x"
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 0d6d9e4..d35a839 100644
--- a/include/hw/sd/sd.h
+++ b/include/hw/sd/sd.h
@@ -96,6 +96,9 @@
#define TYPE_SD_CARD_SPI "sd-card-spi"
DECLARE_INSTANCE_CHECKER(SDState, SD_CARD_SPI, TYPE_SD_CARD_SPI)
+#define TYPE_EMMC "emmc"
+DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC)
+
struct SDCardClass {
/*< private >*/
DeviceClass parent_class;
