commit ded97005b2baf6669c102d92f87b5d622136ad18
author Philippe Mathieu-Daudé <philmd@linaro.org> Wed Sep 24 18:32:54 2025 +0200
committer Peter Maydell <peter.maydell@linaro.org> Fri Sep 26 11:12:22 2025 +0100
tree 8d2080bd4e2fa43109653dccf4474cca6bbc58e6
parent e733dfcf907267ede51452f0e6f28846d5a6abb5

target/arm: Trace vCPU reset call

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/cpu.c

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f8e6749..30e29fd 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -227,6 +227,8 @@
     ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj);
     CPUARMState *env = &cpu->env;
 
+    trace_arm_cpu_reset(arm_cpu_mp_affinity(cpu));
+
     if (acc->parent_phases.hold) {
         acc->parent_phases.hold(obj, type);
     }

target/arm/trace-events

diff --git a/target/arm/trace-events b/target/arm/trace-events
index badff2b..72a2c7d 100644
--- a/target/arm/trace-events
+++ b/target/arm/trace-events
@@ -15,6 +15,7 @@
 kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64
 
 # cpu.c
+arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64
 arm_emulate_firmware_reset(uint64_t mp_aff, unsigned target_el) "cpu %" PRIu64 " @EL%u"
 
 # arm-powerctl.c