)]}'
{
  "commit": "ded1db48c9f9b35f6d9569e53503e2b345f6d44e",
  "tree": "83fc56b4e8bd61b1e69492a9c5ecdbd946826e83",
  "parents": [
    "83a3a20e59fa4b1add714bb4062af0d144b67ab7"
  ],
  "author": {
    "name": "Richard Henderson",
    "email": "richard.henderson@linaro.org",
    "time": "Mon Aug 19 17:39:55 2024 +1000"
  },
  "committer": {
    "name": "Richard Henderson",
    "email": "richard.henderson@linaro.org",
    "time": "Wed Aug 21 09:11:26 2024 +1000"
  },
  "message": "target/i386: Fix tss access size in switch_tss_ra\n\nThe two limit_max variables represent size - 1, just like the\nencoding in the GDT, thus the \u0027old\u0027 access was off by one.\nAccess the minimal size of the new tss: the complete tss contains\nthe iopb, which may be a larger block than the access api expects,\nand irrelevant because the iopb is not accessed during the\nswitch itself.\n\nFixes: 8b131065080a (\"target/i386/tcg: use X86Access for TSS access\")\nResolves: https://gitlab.com/qemu-project/qemu/-/issues/2511\nSigned-off-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nMessage-Id: \u003c20240819074052.207783-1-richard.henderson@linaro.org\u003e\nReviewed-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Pierrick Bouvier \u003cpierrick.bouvier@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "bab552cd535f9051a6a2a22db7a513a3c7005144",
      "old_mode": 33188,
      "old_path": "target/i386/tcg/seg_helper.c",
      "new_id": "3b8fd827e1f78dbfbf1320009ca751b9c96ce6b3",
      "new_mode": 33188,
      "new_path": "target/i386/tcg/seg_helper.c"
    }
  ]
}