)]}'
{
  "commit": "dcd028517749835a618bb1fe8dca32d82318e1c1",
  "tree": "1dcae72985b87a2b15f1bd372cf5974e14d3703f",
  "parents": [
    "13c2fc34f18491c7b74451cc64e91139bc5db272"
  ],
  "author": {
    "name": "SeungJu Cheon",
    "email": "suunj1331@gmail.com",
    "time": "Thu Jun 25 17:15:21 2026 +0900"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Wed Jul 01 19:59:09 2026 +1000"
  },
  "message": "target/riscv: Apply UXL WARL handling to vsstatus\n\nwrite_mstatus() already handles the reserved UXL value by writing a\nlegal value instead.\n\nApply the same handling when writing vsstatus so that reserved UXL\nvalues follow the same WARL behavior.\n\nFactor the common logic into a local helper riscv_write_uxl() and use\nit for both mstatus and vsstatus.\n\nSuggested-by: Daniel Henrique Barboza \u003cdaniel.barboza@oss.qualcomm.com\u003e\nFixes: f310df58bd2 (\"target/riscv: Enable uxl field write\")\nSigned-off-by: SeungJu Cheon \u003csuunj1331@gmail.com\u003e\nReviewed-by: Daniel Henrique Barboza \u003cdaniel.barboza@oss.qualcomm.com\u003e\nMessage-ID: \u003c20260625081521.595683-1-suunj1331@gmail.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7fb0ad5bc174faf62b9bc8507d0bb4c506afb87d",
      "old_mode": 33188,
      "old_path": "target/riscv/csr.c",
      "new_id": "7168a4dc12eb861c4c8d88be4bd5f2838cbc68da",
      "new_mode": 33188,
      "new_path": "target/riscv/csr.c"
    }
  ]
}