tree 14f4f3929206ac712fbdd06c0ab06b264e6b6d39
parent e91a7227cb802ea62ffa14707ebc2f588b01213d
author Richard Henderson <richard.henderson@linaro.org> 1634699818 -0700
committer Alistair Francis <alistair@alistair23.me> 1634852871 +1000

target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl

Shortly, the set of supported XL will not be just 32 and 64,
and representing that properly using the enumeration will be
imperative.

Two places, booting and gdb, intentionally use misa_mxl_max
to emphasize the use of the reset value of misa.mxl, and not
the current cpu state.

Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-5-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>