)]}'
{
  "commit": "db052d0eafe86c336d512dba99a1ec7c5c553f63",
  "tree": "90f4e91705effca54d7eae53cd40c4b561dd8130",
  "parents": [
    "944128ee8e26d70a29c66e0e630ceb371750f23c"
  ],
  "author": {
    "name": "Jamin Lin",
    "email": "jamin_lin@aspeedtech.com",
    "time": "Thu Feb 15 15:53:31 2024 +0800"
  },
  "committer": {
    "name": "Cédric Le Goater",
    "email": "clg@kaod.org",
    "time": "Tue Feb 27 13:47:05 2024 +0100"
  },
  "message": "aspeed: fix hardcode boot address 0\n\nIn the previous design of ASPEED SOCs QEMU model, it set the boot\naddress at \"0\" which was the hardcode setting for ast10x0, ast2600,\nast2500 and ast2400.\n\nAccording to the design of ast2700, it has a bootmcu(riscv-32) which\nis used for executing SPL and initialize DRAM and copy u-boot image\nfrom SPI/Flash to DRAM at address 0x400000000 at SPL boot stage.\nThen, CPUs(cortex-a35) execute u-boot, kernel and rofs.\n\nCurrently, qemu not support emulate two CPU architectures\nat the same machine. Therefore, qemu will only support\nto emulate CPU(cortex-a35) side for ast2700 and the boot\naddress is \"0x4 00000000\".\n\nFixed hardcode boot address \"0\" for future models using\na different mapping address.\n\nSigned-off-by: Troy Lee \u003ctroy_lee@aspeedtech.com\u003e\nSigned-off-by: Jamin Lin \u003cjamin_lin@aspeedtech.com\u003e\nReviewed-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0af96afa16a61725ece4c7990b047c3ab6e6655a",
      "old_mode": 33188,
      "old_path": "hw/arm/aspeed.c",
      "new_id": "8854581ca8de916d599901ff506d7fe7b31a0997",
      "new_mode": 33188,
      "new_path": "hw/arm/aspeed.c"
    },
    {
      "type": "modify",
      "old_id": "95da85fee029d86f91679487b58cc7d10a50108c",
      "old_mode": 33188,
      "old_path": "hw/arm/aspeed_ast2400.c",
      "new_id": "d12588620751526ed7a9eb0fd0fa5e91a819a2c4",
      "new_mode": 33188,
      "new_path": "hw/arm/aspeed_ast2400.c"
    },
    {
      "type": "modify",
      "old_id": "f74561ecdcd53150bb9549c94ae3ab5d5123c6c3",
      "old_mode": 33188,
      "old_path": "hw/arm/aspeed_ast2600.c",
      "new_id": "174be537709b059ae3ea4e478cd3a35bfa1dc946",
      "new_mode": 33188,
      "new_path": "hw/arm/aspeed_ast2600.c"
    },
    {
      "type": "modify",
      "old_id": "e1a023be538b0e8fe839402ead4a7bca7faf1f88",
      "old_mode": 33188,
      "old_path": "include/hw/arm/aspeed_soc.h",
      "new_id": "c60fac900acb23a0a6ec3491ec20ad9f7d2b0cdd",
      "new_mode": 33188,
      "new_path": "include/hw/arm/aspeed_soc.h"
    }
  ]
}