)]}'
{
  "commit": "da96ad4a6a2ef26c83b15fa95e7fceef5147269c",
  "tree": "3780fdfeef4cb0a04dd2c5b3aa4e444adf38aac7",
  "parents": [
    "8e31b744fdf2c5d933681e4128acee72a83af4b8",
    "9a4b35f57eefbfc6977ed47d1f19d839e9e4784d"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Fri Feb 16 11:05:14 2024 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Fri Feb 16 11:05:14 2024 +0000"
  },
  "message": "Merge tag \u0027hw-misc-20240215\u0027 of https://github.com/philmd/qemu into staging\n\nMisc HW patch queue\n\n- Remove unused MIPS SAAR* registers (Phil)\n- Remove warning when testing the TC58128 NAND EEPROM (Peter)\n- KConfig cleanups around ISA SuperI/O and MIPS (Paolo)\n- QDev API uses sanitization (Philippe)\n- Split AHCI model as PCI / SysBus (Philippe)\n- Add SMP support to SPARC Leon3 board (Clément)\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXOUD4ACgkQ4+MsLN6t\n# wN6gWRAAjf+6Z9VUvvHqZoaSJW49k+GRUelTI2tyN+eGfetAx9dk8aIbpbV1X12d\n# pc56jsSi6ICT7baCegtxHszhYJr2e9A2QLCAOJt+Oz87kEGes3ONVVKAk7pwjKxt\n# m8pmU3uXWgFvU6PoFBhGBa6LiZBulgLNXBUwzmEhc9PpPkR49ULdDp/qxtWvxOV5\n# xYBktFlkiT+AvHq3QWCnDIaw+pH5ghEq9BI4xFOvvvqSqdHEqsGAaiKPa9Po0Gfz\n# Ap9qsm4FxKxhGoeQWtAIP8TvN3pFFSXMysziP6Xt1rffKsvF9ioghGKRM6BgQfqD\n# ZetjcFbcf7dQu3zZVy8ljYcymMxfZcWWVVq4CMC68lPQE97hz1CT3PJjgd77dKfi\n# z60uRkOGaiPW5iIGT9+vdQxZ5K3HivKyjuHOdV8V4HnWO3oqgfDtNHn5RKed0qUg\n# g1FoWriJGsDixdx1vd0EoH2/oTxy4HIsFv7a1OjiZyBLjO+EeEZ3+H9pqUHqBxva\n# +Dv70z9F1sv5dzcUXH+oCgTbnKlJ90Q+e3vj0wGdlBncVsgIwbtgqYelhUEl+xJX\n# Mu6KNUo5ANVP38ZKG0GSMCZHfcUjc5s+5rG55NbTN0HiF56a6D2KlQAuXdUsGE1J\n# 7i4cwipJmfxzbdPDlSb3kBxm5pFexEk6nROF9kTHQj3ZBMMvIls\u003d\n# \u003dnOX+\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Thu 15 Feb 2024 17:56:14 GMT\n# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE\n# gpg: Good signature from \"Philippe Mathieu-Daudé (F4BUG) \u003cf4bug@amsat.org\u003e\" [full]\n# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE\n\n* tag \u0027hw-misc-20240215\u0027 of https://github.com/philmd/qemu: (56 commits)\n  hw/ide/ich9: Use AHCIPCIState typedef\n  hw/ide/ahci: Move SysBus definitions to \u0027ahci-sysbus.h\u0027\n  hw/ide/ahci: Remove SysbusAHCIState::num_ports field\n  hw/ide/ahci: Do not pass \u0027ports\u0027 argument to ahci_realize()\n  hw/ide/ahci: Convert AHCIState::ports to unsigned\n  hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs()\n  hw/ide/ahci: Inline ahci_get_num_ports()\n  hw/ide/ahci: Rename AHCI PCI function as \u0027pdev\u0027\n  hw/ide/ahci: Expose AHCIPCIState structure\n  hw/i386/q35: Use DEVICE() cast macro with PCIDevice object\n  hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled\n  MAINTAINERS: Add myself as reviewer for TCG Plugins\n  MAINTAINERS: replace Fabien by myself as Leon3 maintainer\n  hw/sparc/leon3: Initialize GPIO before realizing CPU devices\n  hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu()\n  hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in()\n  hw/sparc/leon3: check cpu_id in the tiny bootloader\n  hw/sparc/leon3: implement multiprocessor\n  hw/sparc/leon3: remove SP initialization\n  target/sparc: implement asr17 feature for smp\n  ...\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": []
}