tree f35ac3cc6325ef874f7e1b5a6b6b782d37d9a923
parent ef009e4b4dc0421464008e6e303b892141ede579
parent 73188068d7ba40c8a37b4763db38bb1ce24ca07d
author Richard Henderson <richard.henderson@linaro.org> 1722342337 +1000
committer Richard Henderson <richard.henderson@linaro.org> 1722342337 +1000
mergetag object 73188068d7ba40c8a37b4763db38bb1ce24ca07d
 type commit
 tag pull-target-arm-20240730
 tagger Peter Maydell <peter.maydell@linaro.org> 1722332227 +0100
 
 target-arm queue:
  * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
  * hw/arm/smmuv3: Assert input to oas2bits() is valid
  * target/arm/kvm: Set PMU for host only when available
  * target/arm/kvm: Do not silently remove PMU
  * hvf: arm: Properly disable PMU
  * hvf: arm: Do not advance PC when raising an exception
  * hw/misc/bcm2835_property: several minor bugfixes
  * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
  * target/arm: Fix UMOPA/UMOPS of 16-bit values
  * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
  * system/physmem: Where we assume we have a RAM MR, assert it
  * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues
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Merge tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
 * hw/arm/smmuv3: Assert input to oas2bits() is valid
 * target/arm/kvm: Set PMU for host only when available
 * target/arm/kvm: Do not silently remove PMU
 * hvf: arm: Properly disable PMU
 * hvf: arm: Do not advance PC when raising an exception
 * hw/misc/bcm2835_property: several minor bugfixes
 * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
 * target/arm: Fix UMOPA/UMOPS of 16-bit values
 * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
 * system/physmem: Where we assume we have a RAM MR, assert it
 * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues

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# gpg: Signature made Tue 30 Jul 2024 07:39:12 PM AEST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits)
  system/physmem: Where we assume we have a RAM MR, assert it
  target/sh4: Avoid shift into sign bit in update_itlb_use()
  target/i386: Remove dead assignment to ss in do_interrupt64()
  target/m68k: avoid shift into sign bit in dump_address_map()
  target/xtensa: Make use of 'segment' in pptlb helper less confusing
  target/tricore: Use unsigned types for bitops in helper_eq_b()
  target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
  target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
  target/arm: Fix UMOPA/UMOPS of 16-bit values
  target/arm: Don't assert for 128-bit tile accesses when SVL is 128
  hw/misc/bcm2835_property: Reduce scope of variables in mbox push function
  hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row
  hw/misc/bcm2835_property: Avoid overflow in OTP access properties
  hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE
  hvf: arm: Do not advance PC when raising an exception
  hvf: arm: Properly disable PMU
  hvf: arm: Raise an exception for sysreg by default
  target/arm/kvm: Do not silently remove PMU
  target/arm/kvm: Set PMU for host only when available
  hw/arm/smmuv3: Assert input to oas2bits() is valid
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>