target-arm: Define and use ARM_FEATURE_CBAR

Some processors (notably A9 within Highbank) define and use the
CP15 configuration base address (CBAR). This is vendor specific
so its best implemented as a CPU property (otherwise we would need
vendor specific child classes for every ARM implementation).

This patch prepares support for converting CBAR reset value to
a CPU property by moving the CP registration out of the CPU
init fn, as registration will need to happen at realize time
to pick up any property updates. The easiest way to do this
is via definition of a new ARM_FEATURE to flag the existence
of the register.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 9f697ef1e2ee60a3b9ef971a7f3bc3fa6752a9b7.1387160489.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 files changed
tree: 2a3c60f8a69e384eb3936c4f2a831b1a7d558c33
  1. audio/
  2. backends/
  3. block/
  4. bsd-user/
  5. default-configs/
  6. disas/
  7. docs/
  8. fpu/
  9. fsdev/
  10. gdb-xml/
  11. hw/
  12. include/
  13. libcacard/
  14. linux-headers/
  15. linux-user/
  16. net/
  17. pc-bios/
  18. po/
  19. qapi/
  20. qga/
  21. qobject/
  22. qom/
  23. roms/
  24. scripts/
  25. slirp/
  26. stubs/
  27. sysconfigs/
  28. target-alpha/
  29. target-arm/
  30. target-cris/
  31. target-i386/
  32. target-lm32/
  33. target-m68k/
  34. target-microblaze/
  35. target-mips/
  36. target-moxie/
  37. target-openrisc/
  38. target-ppc/
  39. target-s390x/
  40. target-sh4/
  41. target-sparc/
  42. target-unicore32/
  43. target-xtensa/
  44. tcg/
  45. tests/
  46. trace/
  47. ui/
  48. util/
  49. .exrc
  50. .gitignore
  51. .gitmodules
  52. .mailmap
  53. .travis.yml
  54. aio-posix.c
  55. aio-win32.c
  56. arch_init.c
  57. async.c
  58. balloon.c
  59. block-migration.c
  60. block.c
  61. blockdev-nbd.c
  62. blockdev.c
  63. blockjob.c
  64. bt-host.c
  65. bt-vhci.c
  66. Changelog
  67. CODING_STYLE
  68. configure
  69. COPYING
  70. COPYING.LIB
  71. coroutine-gthread.c
  72. coroutine-sigaltstack.c
  73. coroutine-ucontext.c
  74. coroutine-win32.c
  75. cpu-exec.c
  76. cpus.c
  77. cputlb.c
  78. device-hotplug.c
  79. device_tree.c
  80. disas.c
  81. dma-helpers.c
  82. dump.c
  83. exec.c
  84. gdbstub.c
  85. HACKING
  86. hmp-commands.hx
  87. hmp.c
  88. hmp.h
  89. iohandler.c
  90. ioport.c
  91. kvm-all.c
  92. kvm-stub.c
  93. LICENSE
  94. main-loop.c
  95. MAINTAINERS
  96. Makefile
  97. Makefile.objs
  98. Makefile.target
  99. memory.c
  100. memory_mapping.c
  101. migration-exec.c
  102. migration-fd.c
  103. migration-rdma.c
  104. migration-tcp.c
  105. migration-unix.c
  106. migration.c
  107. monitor.c
  108. nbd.c
  109. os-posix.c
  110. os-win32.c
  111. page_cache.c
  112. qapi-schema.json
  113. qdev-monitor.c
  114. qdict-test-data.txt
  115. qemu-bridge-helper.c
  116. qemu-char.c
  117. qemu-coroutine-io.c
  118. qemu-coroutine-lock.c
  119. qemu-coroutine-sleep.c
  120. qemu-coroutine.c
  121. qemu-doc.texi
  122. qemu-img-cmds.hx
  123. qemu-img.c
  124. qemu-img.texi
  125. qemu-io-cmds.c
  126. qemu-io.c
  127. qemu-log.c
  128. qemu-nbd.c
  129. qemu-nbd.texi
  130. qemu-options-wrapper.h
  131. qemu-options.h
  132. qemu-options.hx
  133. qemu-seccomp.c
  134. qemu-tech.texi
  135. qemu-timer.c
  136. qemu.nsi
  137. qemu.sasl
  138. qmp-commands.hx
  139. qmp.c
  140. qtest.c
  141. readline.c
  142. README
  143. rules.mak
  144. savevm.c
  145. spice-qemu-char.c
  146. tcg-runtime.c
  147. tci.c
  148. thread-pool.c
  149. thunk.c
  150. tpm.c
  151. trace-events
  152. translate-all.c
  153. translate-all.h
  154. user-exec.c
  155. VERSION
  156. version.rc
  157. vl.c
  158. xbzrle.c
  159. xen-all.c
  160. xen-mapcache.c
  161. xen-stub.c