escc: avoid structure holes spotted by pahole
Edited report from pahole on amd64 host:
struct ChannelState {
...
ChnType type; /* 32 4 */
/* XXX 4 bytes hole, try to pack */
...
uint8_t rregs[16]; /* 66 16 */
/* XXX 2 bytes hole, try to pack */
...
/* size: 392, cachelines: 7 */
/* sum members: 382, holes: 2, sum holes: 6 */
/* padding: 4 */
/* last cacheline: 8 bytes */
}; /* definitions: 1 */
Fix by rearranging the structure to avoid padding.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
diff --git a/hw/escc.c b/hw/escc.c
index bea5873..ffcd746 100644
--- a/hw/escc.c
+++ b/hw/escc.c
@@ -108,18 +108,19 @@
#define SERIAL_REGS 16
typedef struct ChannelState {
qemu_irq irq;
- uint32_t reg;
uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
- ChnID chn; // this channel, A (base+4) or B (base+0)
- ChnType type;
struct ChannelState *otherchn;
- uint8_t rx, tx, wregs[SERIAL_REGS], rregs[SERIAL_REGS];
+ uint32_t reg;
+ uint8_t wregs[SERIAL_REGS], rregs[SERIAL_REGS];
SERIOQueue queue;
CharDriverState *chr;
int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
int disabled;
int clock;
uint32_t vmstate_dummy;
+ ChnID chn; // this channel, A (base+4) or B (base+0)
+ ChnType type;
+ uint8_t rx, tx;
} ChannelState;
struct SerialState {
