tree 82fe84cb258311ae6eefd828ec76c145321df7ca
parent 32957aad8ce3cd4f923b464efb80645963479ff8
author Peter Maydell <peter.maydell@linaro.org> 1660906850 +0100
committer Richard Henderson <richard.henderson@linaro.org> 1663150780 +0100

target/arm: Implement ID_DFR1

In Armv8.6, a new AArch32 ID register ID_DFR1 is defined; implement
it. We don't have any CPUs with features that they need to advertise
here yet, but plumbing in the ID register gives it the right name
when debugging and will help in future when we do add a CPU that
has non-zero ID_DFR1 fields.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220819110052.2942289-5-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>