commit d0ae87a27c212b4dda1b5e83507f5ebdfd019097
author Richard Henderson <richard.henderson@linaro.org> Sun Mar 24 14:03:05 2024 -1000
committer Richard Henderson <richard.henderson@linaro.org> Wed Mar 27 12:15:25 2024 -1000
tree 6a491aac5f72972a081c609ec8da436d9e989c3a
parent 7d50b696601deecfcefcfb2d8ba9eaf98cb294b6

target/hppa: Fix DCOR reconstruction of carry bits

The carry bits for each nibble N are located in bit (N+1)*4,
so the shift by 3 was off by one.  Furthermore, the carry bit
for the most significant carry bit is indeed located in bit 64,
which is located in a different storage word.

Use a double-word shift-right to reassemble into a single word
and place them all at bit 0 of their respective nibbles.

Tested-by: Helge Deller <deller@gmx.de>
Reviewed-by: Helge Deller <deller@gmx.de>
Fixes: b2167459ae4 ("target-hppa: Implement basic arithmetic")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

target/hppa/translate.c

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index e041310..a3f425d 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2791,7 +2791,7 @@
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i64();
-    tcg_gen_shri_i64(tmp, cpu_psw_cb, 3);
+    tcg_gen_extract2_i64(tmp, cpu_psw_cb, cpu_psw_cb_msb, 4);
     if (!is_i) {
         tcg_gen_not_i64(tmp, tmp);
     }