)]}'
{
  "commit": "cebaf7434b4af059caca053ee1ec7ed8df91c2a7",
  "tree": "cf8f19d66a8778b2c6cb65ce477a9a67ac8287bd",
  "parents": [
    "c69fc80035b708a8b997cbab0d393e2702364a3e"
  ],
  "author": {
    "name": "stove",
    "email": "stove@rivosinc.com",
    "time": "Wed Aug 27 13:36:17 2025 -0700"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Fri Oct 03 13:15:14 2025 +1000"
  },
  "message": "target/riscv: use riscv_csrr in riscv_csr_read\n\nCommit 38c83e8d3a33 (\"target/riscv: raise an exception when CSRRS/CSRRC\nwrites a read-only CSR\") changed the behavior of riscv_csrrw, which\nwould formerly be treated as read-only if the write mask were set to 0.\n\nFixes an exception being raised when accessing read-only vector CSRs\nlike vtype.\n\nFixes: 38c83e8d3a33 (\"target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR\")\n\nSigned-off-by: stove \u003cstove@rivosinc.com\u003e\nReviewed-by: Daniel Henrique Barboza \u003cdbarboza@ventanamicro.com\u003e\nMessage-ID: \u003c20250827203617.79947-1-stove@rivosinc.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "738e68fa6e25cd589352e3861d51ff48047b71ac",
      "old_mode": 33188,
      "old_path": "target/riscv/cpu.h",
      "new_id": "2c2266415ec87853f3b01f8509605a67c620729c",
      "new_mode": 33188,
      "new_path": "target/riscv/cpu.h"
    }
  ]
}
