)]}'
{
  "commit": "cdbb7c3fa6f67d3370965cb0e4bbfdbca04c0913",
  "tree": "7fbca6052d000bc2b1b4e5652c6ea48bee98b3bd",
  "parents": [
    "35a5e8792046df64df10550cd7de4bbc0a2c1018"
  ],
  "author": {
    "name": "Guenter Roeck",
    "email": "linux@roeck-us.net",
    "time": "Sat Oct 04 13:00:49 2025 -0700"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Fri Oct 24 09:24:08 2025 +1000"
  },
  "message": "microchip icicle: Enable PCS on Cadence Ethernet\n\nPCS needs to be enabled for SGMII to be supported by the Linux kernel.\n\nSigned-off-by: Guenter Roeck \u003clinux@roeck-us.net\u003e\nAcked-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nMessage-ID: \u003c20251004200049.871646-5-linux@roeck-us.net\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9fbfba8ece8f462ac830e31cbcaaa29a45c0e9cb",
      "old_mode": 33188,
      "old_path": "hw/riscv/microchip_pfsoc.c",
      "new_id": "4c939d8e96c5a32ae4f997390dc8c1eb554494e9",
      "new_mode": 33188,
      "new_path": "hw/riscv/microchip_pfsoc.c"
    }
  ]
}