)]}'
{
  "commit": "cd633bea8b0d30f3418b0dd372116bf3e028e42f",
  "tree": "9d1156116d67655b21f73a570e5534999e3ed722",
  "parents": [
    "b0175841fa4f867b4b1219dba72c33392118dd43"
  ],
  "author": {
    "name": "Jay Chang",
    "email": "jay.chang@sifive.com",
    "time": "Fri Jun 06 15:25:25 2025 +0800"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Fri Jul 04 21:09:48 2025 +1000"
  },
  "message": "target/riscv: Make PMP region count configurable\n\nPreviously, the number of PMP regions was hardcoded to 16 in QEMU.\nThis patch replaces the fixed value with a new `pmp_regions` field,\nallowing platforms to configure the number of PMP regions.\n\nIf no specific value is provided, the default number of PMP regions\nremains 16 to preserve the existing behavior.\n\nA new CPU parameter num-pmp-regions has been introduced to the QEMU\ncommand line. For example:\n\n\t-cpu rv64, g\u003dtrue, c\u003dtrue, pmp\u003dtrue, num-pmp-regions\u003d8\n\nSigned-off-by: Jay Chang \u003cjay.chang@sifive.com\u003e\nReviewed-by: Frank Chang \u003cfrank.chang@sifive.com\u003e\nReviewed-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nMessage-ID: \u003c20250606072525.17313-3-jay.chang@sifive.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
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      "old_path": "target/riscv/cpu_cfg_fields.h.inc",
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      "new_path": "target/riscv/cpu_cfg_fields.h.inc"
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}