commit cd629de1cf013e9654c6f0b92b2329f04dfaf880
author Richard Henderson <rth@twiddle.net> Tue Jun 04 11:37:17 2013 -0700
committer Richard Henderson <rth@twiddle.net> Sat Nov 30 07:45:13 2013 +1300
tree 32d1754eb99e7eeddc832ef2188c71afe492a6fd
parent b6a3e690b4f396633c75e18a9c3e7b6771fb71ba

tcg-ppc64: Use qemu_getauxval

Allow host detection on linux systems without glibc 2.16 or later.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>

tcg/ppc64/tcg-target.c

diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 6109d86..06e440f 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -45,15 +45,10 @@
 #define GUEST_BASE 0
 #endif
 
-#ifdef CONFIG_GETAUXVAL
-#include <sys/auxv.h>
+#include "elf.h"
 static bool have_isa_2_06;
 #define HAVE_ISA_2_06  have_isa_2_06
 #define HAVE_ISEL      have_isa_2_06
-#else
-#define HAVE_ISA_2_06  0
-#define HAVE_ISEL      0
-#endif
 
 #ifdef CONFIG_USE_GUEST_BASE
 #define TCG_GUEST_BASE_REG 30
@@ -2132,12 +2127,10 @@
 
 static void tcg_target_init(TCGContext *s)
 {
-#ifdef CONFIG_GETAUXVAL
-    unsigned long hwcap = getauxval(AT_HWCAP);
+    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
     if (hwcap & PPC_FEATURE_ARCH_2_06) {
         have_isa_2_06 = true;
     }
-#endif
 
     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);