tree a56b706f73b4a109ec7d786848cddd8fcac32606
parent 32cfd7f39e0811036efd3a7a12d0f975ef57fdb3
author Eric Auger <eric.auger@redhat.com> 1530031842 +0100
committer Peter Maydell <peter.maydell@linaro.org> 1530031842 +0100

hw/arm/smmuv3: IOTLB emulation

We emulate a TLB cache of size SMMU_IOTLB_MAX_SIZE=256.
It is implemented as a hash table whose key is a combination
of the 16b asid and 48b IOVA (Jenkins hash).

Entries are invalidated on TLB invalidation commands, either
globally, or per asid, or per asid/iova.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 1529653501-15358-4-git-send-email-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>