)]}'
{
  "commit": "cae44a92ab23811deeefa0a44b1bdec6cfa8e4b9",
  "tree": "3276dabd7a631bf794d92516273d458f6550f9c3",
  "parents": [
    "4c1a39eebc6a9f1db816ff6c23e3d42ba52e2601"
  ],
  "author": {
    "name": "Sebastian Huber",
    "email": "sebastian.huber@embedded-brains.de",
    "time": "Wed Mar 19 07:13:34 2025 +0100"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Mon May 19 13:30:24 2025 +1000"
  },
  "message": "hw/riscv: More flexible FDT placement for MPFS\n\nIf the kernel entry is in the high DRAM area, place the FDT into this\narea.\n\nSigned-off-by: Sebastian Huber \u003csebastian.huber@embedded-brains.de\u003e\nReviewed-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nMessage-ID: \u003c20250319061342.26435-3-sebastian.huber@embedded-brains.de\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e39ee657cd0d4eb28563a2613e4c9113ef23a461",
      "old_mode": 33188,
      "old_path": "hw/riscv/microchip_pfsoc.c",
      "new_id": "6bb44e3ac5e9e3287fb22caf759e9d0cfe44eecf",
      "new_mode": 33188,
      "new_path": "hw/riscv/microchip_pfsoc.c"
    }
  ]
}