tree 17c8eb391a8d03a3002cee3235df59bce50a7dd5
parent b72e3ff65880f2b894a2692e2b0a14424058a919
author Richard Henderson <richard.henderson@linaro.org> 1566770574 -0700
committer Richard Henderson <richard.henderson@linaro.org> 1567626523 -0700

target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init

These registers are read-only and implementation specific.
Initiailize VR for the first time; take the OR1200 values
from the verilog source.

Note that moving fields within CPUOpenRISCState does not
affect migration.

Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>