commit c30a0757f094c107e491820e3d35224eb68859c7
author Alistair Francis <alistair.francis@wdc.com> Sat Apr 24 13:34:37 2021 +1000
committer Alistair Francis <alistair.francis@wdc.com> Tue May 11 20:02:07 2021 +1000
tree c7f425b5df001b5947efd027d1a4b16fec69c2f0
parent 6baba30ad0b7fbad035a530cc8d0a16c9cc74dc9

target/riscv: Fix the RV64H decode comment

BugLink: https://gitlab.com/qemu-project/qemu/-/issues/47
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 024ce841221c1d15c74b253512428c4baca7e4ba.1619234854.git.alistair.francis@wdc.com

target/riscv/insn32.decode

diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index fecf0f1..8901ba1 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -288,7 +288,7 @@
 hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
 hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
 
-# *** RV32H Base Instruction Set ***
+# *** RV64H Base Instruction Set ***
 hlv_wu    0110100  00001   ..... 100 ..... 1110011 @r2
 hlv_d     0110110  00000   ..... 100 ..... 1110011 @r2
 hsv_d     0110111  .....   ..... 100 00000 1110011 @r2_s