tests/tcg/ppc64/Makefile.target

# -*- Mode: makefile -*-
#
# ppc64 specific tweaks

VPATH += $(SRC_PATH)/tests/tcg/ppc64

config-cc.mak: Makefile
	$(quiet-@)( \
	    $(call cc-option,-mpower8-vector,   CROSS_CC_HAS_POWER8_VECTOR); \
	    $(call cc-option,-mpower10,         CROSS_CC_HAS_POWER10)) 3> config-cc.mak

-include config-cc.mak

ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),)
PPC64_TESTS=bcdsub non_signalling_xscv
endif
$(PPC64_TESTS): CFLAGS += -mpower8-vector

ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),)
PPC64_TESTS += vsx_f2i_nan
endif
vsx_f2i_nan: CFLAGS += -mpower8-vector -I$(SRC_PATH)/include

PPC64_TESTS += mtfsf
PPC64_TESTS += mffsce

ifneq ($(CROSS_CC_HAS_POWER10),)
PPC64_TESTS += byte_reverse sha512-vector vector
endif
byte_reverse: CFLAGS += -mcpu=power10
run-byte_reverse: QEMU_OPTS+=-cpu POWER10

sha512-vector: CFLAGS +=-mcpu=power10 -O3
sha512-vector: sha512.c
	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)

run-sha512-vector: QEMU_OPTS+=-cpu POWER10

vector: CFLAGS += -mcpu=power10 -I$(SRC_PATH)/include
run-vector: QEMU_OPTS += -cpu POWER10

PPC64_TESTS += signal_save_restore_xer
PPC64_TESTS += xxspltw
PPC64_TESTS += test-aes

ifneq ($(GDB),)
# Skip for now until vsx registers sorted out
run-gdbstub-registers:
	$(call skip-test, $<, "BROKEN reading VSX registers")
endif


TESTS += $(PPC64_TESTS)