commit | ff7936f0093fab939bf4a8bff316b2cbd7f9f35f | [log] [tgz] |
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author | Siarhei Volkau <lis8215@gmail.com> | Thu Jun 08 13:41:56 2023 +0300 |
committer | Philippe Mathieu-Daudé <philmd@linaro.org> | Mon Jul 10 23:33:38 2023 +0200 |
tree | 2f6ebed0892a3fc6317bd098cdfac57520332613 | |
parent | fc34c76f365a110977234ddcaaba4198dcd4c397 [diff] |
target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns These instructions are part of pool1, see the grand tree above in the file. Q8ADD is part of pool1 too but belong to another category of instructions, thus will be made in later patches. Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Message-Id: <20230608104222.1520143-8-lis8215@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>