target/riscv: create finalize_features() for KVM
To turn cbom_blocksize and cboz_blocksize into class properties we need
KVM specific changes.
KVM is creating its own version of these options with a customized
setter() that prevents users from picking an invalid value during init()
time. This comes at the cost of duplicating each option that KVM
supports. This will keep happening for each new shared option KVM
implements in the future.
We can avoid that by using the same property TCG uses and adding
specific KVM handling during finalize() time, like TCG already does with
riscv_tcg_cpu_finalize_features(). To do that, the common CPU property
offers a way of knowing if an option was user set or not, sparing us
from doing unneeded syscalls.
riscv_kvm_cpu_finalize_features() is then created using the same
KVMScratch CPU we already use during init() time, since finalize() time
is still too early to use the official KVM CPU for it. cbom_blocksize
and cboz_blocksize are then handled during finalize() in the same way
they're handled by their KVM specific setter.
With this change we can proceed with the blocksize changes in the common
code without breaking the KVM driver.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
tested-by tags added, rebased with Alistair's riscv-to-apply.next.
Message-ID: <20240112140201.127083-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 1d4b2b1..3703efe 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -68,6 +68,11 @@
GUINT_TO_POINTER(value));
}
+bool riscv_cpu_option_set(const char *optname)
+{
+ return g_hash_table_contains(general_user_opts, optname);
+}
+
#define ISA_EXT_DATA_ENTRY(_name, _min_ver, _prop) \
{#_name, _min_ver, CPU_CFG_OFFSET(_prop)}
@@ -1114,17 +1119,18 @@
}
#endif
- /*
- * KVM accel does not have a specialized finalize()
- * callback because its extensions are validated
- * in the get()/set() callbacks of each property.
- */
if (tcg_enabled()) {
riscv_tcg_cpu_finalize_features(cpu, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
return;
}
+ } else if (kvm_enabled()) {
+ riscv_kvm_cpu_finalize_features(cpu, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
}
}
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 2a5e67c..3e342a5 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -510,6 +510,7 @@
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
char *riscv_isa_string(RISCVCPU *cpu);
+bool riscv_cpu_option_set(const char *optname);
#ifndef CONFIG_USER_ONLY
void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 680a729..dc0466d 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1598,6 +1598,65 @@
return true;
}
+void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
+{
+ CPURISCVState *env = &cpu->env;
+ KVMScratchCPU kvmcpu;
+ struct kvm_one_reg reg;
+ uint64_t val;
+ int ret;
+
+ /* short-circuit without spinning the scratch CPU */
+ if (!cpu->cfg.ext_zicbom && !cpu->cfg.ext_zicboz) {
+ return;
+ }
+
+ if (!kvm_riscv_create_scratch_vcpu(&kvmcpu)) {
+ error_setg(errp, "Unable to create scratch KVM cpu");
+ return;
+ }
+
+ if (cpu->cfg.ext_zicbom &&
+ riscv_cpu_option_set(kvm_cbom_blocksize.name)) {
+
+ reg.id = kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG,
+ kvm_cbom_blocksize.kvm_reg_id);
+ reg.addr = (uint64_t)&val;
+ ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
+ if (ret != 0) {
+ error_setg(errp, "Unable to read cbom_blocksize, error %d", errno);
+ return;
+ }
+
+ if (cpu->cfg.cbom_blocksize != val) {
+ error_setg(errp, "Unable to set cbom_blocksize to a different "
+ "value than the host (%lu)", val);
+ return;
+ }
+ }
+
+ if (cpu->cfg.ext_zicboz &&
+ riscv_cpu_option_set(kvm_cboz_blocksize.name)) {
+
+ reg.id = kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG,
+ kvm_cboz_blocksize.kvm_reg_id);
+ reg.addr = (uint64_t)&val;
+ ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
+ if (ret != 0) {
+ error_setg(errp, "Unable to read cboz_blocksize, error %d", errno);
+ return;
+ }
+
+ if (cpu->cfg.cboz_blocksize != val) {
+ error_setg(errp, "Unable to set cboz_blocksize to a different "
+ "value than the host (%lu)", val);
+ return;
+ }
+ }
+
+ kvm_riscv_destroy_scratch_vcpu(&kvmcpu);
+}
+
static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
{
AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h
index 8329cfa..4bd98fd 100644
--- a/target/riscv/kvm/kvm_riscv.h
+++ b/target/riscv/kvm/kvm_riscv.h
@@ -27,5 +27,6 @@
uint64_t guest_num);
void riscv_kvm_aplic_request(void *opaque, int irq, int level);
int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state);
+void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
#endif