commit | 04331d0b56a0cab2e40a39135a92a15266b37c36 | [log] [tgz] |
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author | Michael Clark <mjc@sifive.com> | Sat Mar 03 01:31:13 2018 +1300 |
committer | Michael Clark <mjc@sifive.com> | Wed Mar 07 08:30:28 2018 +1300 |
tree | 20411fe7fe6cf2c5bd3f7098a67b4fb1a63fe3b9 | |
parent | 88a07990fa282e4b63845223e90d759ef6811264 [diff] |
RISC-V VirtIO Machine RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>