)]}'
{
  "commit": "b933720be22442e6847629fe0dcf24b95cef3d56",
  "tree": "f4365c3b9707e3584de9c03ba79ab7164c9da0b9",
  "parents": [
    "31778448f2c39565062014ae89ca8c2f82522fe5"
  ],
  "author": {
    "name": "Daniel Henrique Barboza",
    "email": "dbarboza@ventanamicro.com",
    "time": "Tue Sep 26 15:31:08 2023 -0300"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Thu Oct 12 12:30:16 2023 +1000"
  },
  "message": "target/riscv: add riscv_cpu_get_name()\n\nWe\u0027ll introduce generic errors that will output a CPU type name via its\nRISCVCPU pointer. Create a helper for that.\n\nUse the helper in tcg_cpu_realizefn() instead of hardcoding the \u0027host\u0027\nCPU name.\n\nSigned-off-by: Daniel Henrique Barboza \u003cdbarboza@ventanamicro.com\u003e\nReviewed-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nMessage-ID: \u003c20230926183109.165878-2-dbarboza@ventanamicro.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a7cc7aa6e2e1937880037b6eacc36a4349cf0f7a",
      "old_mode": 33188,
      "old_path": "target/riscv/cpu.c",
      "new_id": "cdeb24cb5edf66f0e24700c71e5feb023838539c",
      "new_mode": 33188,
      "new_path": "target/riscv/cpu.c"
    },
    {
      "type": "modify",
      "old_id": "7291b847569554c0c82205066d377b5b53eeb74d",
      "old_mode": 33188,
      "old_path": "target/riscv/cpu.h",
      "new_id": "8298f8bf63fbfc4e817af21ab930b34798b3fa3e",
      "new_mode": 33188,
      "new_path": "target/riscv/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "a021ec833de28ed8a1aabc4d2177b11cfe6a621e",
      "old_mode": 33188,
      "old_path": "target/riscv/tcg/tcg-cpu.c",
      "new_id": "104e91846a6130ca0333f27d910f46e43f53b5ad",
      "new_mode": 33188,
      "new_path": "target/riscv/tcg/tcg-cpu.c"
    }
  ]
}