commit b5075d29a88017705c252a0695f279f982f59a6f
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 22 21:37:55 2004 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 22 21:37:55 2004 +0000
tree 6e9cdccf8b332cc5ade8007dac7f619e66237ff1
parent 91caaa612a837f01d84ddce12d659108bd3cefdd

more imul tests


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@737 c046a42c-6fe2-441c-8c8c-71466251a162

tests/test-i386.c

diff --git a/tests/test-i386.c b/tests/test-i386.c
index ce1213a..3e10a993 100644
--- a/tests/test-i386.c
+++ b/tests/test-i386.c
@@ -401,6 +401,23 @@
            "imull", s0, s1, res, flags & CC_MASK);
 }
 
+#define TEST_IMUL_IM(size, size1, op0, op1)\
+{\
+    int res, flags;\
+    flags = 0;\
+    res = 0;\
+    asm ("push %3\n\t"\
+         "popf\n\t"\
+         "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
+         "pushf\n\t"\
+         "popl %1\n\t"\
+         : "=r" (res), "=g" (flags)\
+         : "r" (op1), "1" (flags), "0" (res));\
+    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",\
+           "imul" size, op0, op1, res, flags & CC_MASK);\
+}
+
+
 #undef CC_MASK
 #define CC_MASK (0)
 
@@ -452,6 +469,16 @@
     test_imull2(0x80000000, 0x80000000);
     test_imull2(0x10000, 0x10000);
 
+    TEST_IMUL_IM("w", "w", 45, 0x1234);
+    TEST_IMUL_IM("w", "w", -45, 23);
+    TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
+    TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
+
+    TEST_IMUL_IM("l", "", 45, 0x1234);
+    TEST_IMUL_IM("l", "", -45, 23);
+    TEST_IMUL_IM("l", "", 0x8000, 0x80000000);
+    TEST_IMUL_IM("l", "", 0x7fff, 0x1000);
+
     test_idivb(0x12341678, 0x127e);
     test_idivb(0x43210123, -5);
     test_idivb(0x12340004, -1);