commit b26eefb68e7942eeb689c81fd20e67e57ad95cd2
author pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> Mon Mar 31 03:44:26 2008 +0000
committer pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> Mon Mar 31 03:44:26 2008 +0000
tree 3eb9eaf50ba68bae2729a0ce1974bea027dfb3ef
parent 2a39bc41cb81e1fbd989e0dc648251a1f745c4db

ARM TCG conversion 1/16.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/cpu.h

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index b284a21..275733e 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -89,7 +89,7 @@
     uint32_t NZF; /* N is bit 31. Z is computed from NZF */
     uint32_t QF; /* 0 or 1 */
     uint32_t GE; /* cpsr[19:16] */
-    int thumb; /* cprs[5]. 0 = arm mode, 1 = thumb mode. */
+    uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */
     uint32_t condexec_bits; /* IT bits.  cpsr[15:10,26:25].  */
 
     /* System control coprocessor (cp15) */
@@ -207,6 +207,7 @@
 } CPUARMState;
 
 CPUARMState *cpu_arm_init(const char *cpu_model);
+void arm_translate_init(void);
 int cpu_arm_exec(CPUARMState *s);
 void cpu_arm_close(CPUARMState *s);
 void do_interrupt(CPUARMState *);