| commit | b227f6a8a7db28f48b4f1120d521eacdc25e66ef | [log] [tgz] |
|---|---|---|
| author | Ivan Klokov <ivan.klokov@syntacore.com> | Thu Jun 29 11:37:30 2023 +0300 |
| committer | Alistair Francis <alistair.francis@wdc.com> | Mon Jul 10 22:29:15 2023 +1000 |
| tree | 3172cf08ea2caec02d164201b4eaa933dab0de25 | |
| parent | 4de81093f894c42bce975e52fc7b470a76046301 [diff] |
target/riscv: Add RVV registers to log Print RvV extension register to log if VPU option is enabled. Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230629083730.386604-1-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>