commit | b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f | [log] [tgz] |
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author | Peter Maydell <peter.maydell@linaro.org> | Fri Jun 17 15:23:47 2016 +0100 |
committer | Peter Maydell <peter.maydell@linaro.org> | Fri Jun 17 15:23:51 2016 +0100 |
tree | 9d0ca8f7f1fa404bb28f0849d8ef1b2a5bbb9091 | |
parent | f7b9358e2cf12a5eb07f5f9301fdadc932f9ee03 [diff] |
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers Implement the registers in the GICv3 CPU interface which generate new SGI interrupts. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1465915112-29272-18-git-send-email-peter.maydell@linaro.org