Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180703' into staging
ppc patch queue 2018-07-03
Here's a last minue pull request before today's soft freeze. Ideally
I would have sent this earlier, but I was waiting for a couple of
extra fixes I knew were close. And the freeze crept up on me, like
always.
Most of the changes here are bugfixes in any case. There are some
cleanups as well, which have been in my staging tree for a little
while. There are a couple of truly new features (some extensions to
the sam460ex platform), but these are low risk, since they only affect
a new and not really stabilized machine type anyway.
Higlights are:
* Mac platform improvements from Mark Cave-Ayland
* Sam460ex improvements from BALATON Zoltan et al.
* XICS interrupt handler cleanups from Cédric Le Goater
* TCG improvements for atomic loads and stores from Richard
Henderson
* Assorted other bugfixes
# gpg: Signature made Tue 03 Jul 2018 06:55:22 BST
# gpg: using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-3.0-20180703: (35 commits)
ppc: Include vga cirrus card into the compiling process
target/ppc: Relax reserved bitmask of indexed store instructions
target/ppc: set is_jmp on ppc_tr_breakpoint_check
spapr: compute default value of "hpt-max-page-size" later
target/ppc/kvm: don't pass cpu to kvm_get_smmu_info()
target/ppc/kvm: get rid of kvm_get_fallback_smmu_info()
ppc440_uc: Basic emulation of PPC440 DMA controller
sam460ex: Add RTC device
hw/timer: Add basic M41T80 emulation
ppc4xx_i2c: Rewrite to model hardware more closely
hw/ppc: Give sam46ex its own config option
fpu_helper.c: fix setting FPSCR[FI] bit
target/ppc: Implement the rest of gen_st_atomic
target/ppc: Implement the rest of gen_ld_atomic
target/ppc: Use atomic min/max helpers
target/ppc: Use MO_ALIGN for EXIWX and ECOWX
target/ppc: Split out gen_st_atomic
target/ppc: Split out gen_ld_atomic
target/ppc: Split out gen_load_locked
target/ppc: Tidy gen_conditional_store
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts:
# hw/ppc/spapr.c
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index 8ee85ed..76ae461 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -16,7 +16,6 @@
#include "tcg/tcg.h"
#include "exec/cpu-common.h"
#include "exec/exec-all.h"
-#include "translate-all.h"
void tb_flush(CPUState *cpu)
{
@@ -25,8 +24,3 @@
void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
{
}
-
-void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
- int is_cpu_write_access)
-{
-}
diff --git a/block/backup.c b/block/backup.c
index d18be40..81895dd 100644
--- a/block/backup.c
+++ b/block/backup.c
@@ -45,6 +45,8 @@
QLIST_HEAD(, CowRequest) inflight_reqs;
HBitmap *copy_bitmap;
+ bool use_copy_range;
+ int64_t copy_range_size;
} BackupBlockJob;
static const BlockJobDriver backup_job_driver;
@@ -86,19 +88,101 @@
qemu_co_queue_restart_all(&req->wait_queue);
}
+/* Copy range to target with a bounce buffer and return the bytes copied. If
+ * error occured, return a negative error number */
+static int coroutine_fn backup_cow_with_bounce_buffer(BackupBlockJob *job,
+ int64_t start,
+ int64_t end,
+ bool is_write_notifier,
+ bool *error_is_read,
+ void **bounce_buffer)
+{
+ int ret;
+ struct iovec iov;
+ QEMUIOVector qiov;
+ BlockBackend *blk = job->common.blk;
+ int nbytes;
+
+ hbitmap_reset(job->copy_bitmap, start / job->cluster_size, 1);
+ nbytes = MIN(job->cluster_size, job->len - start);
+ if (!*bounce_buffer) {
+ *bounce_buffer = blk_blockalign(blk, job->cluster_size);
+ }
+ iov.iov_base = *bounce_buffer;
+ iov.iov_len = nbytes;
+ qemu_iovec_init_external(&qiov, &iov, 1);
+
+ ret = blk_co_preadv(blk, start, qiov.size, &qiov,
+ is_write_notifier ? BDRV_REQ_NO_SERIALISING : 0);
+ if (ret < 0) {
+ trace_backup_do_cow_read_fail(job, start, ret);
+ if (error_is_read) {
+ *error_is_read = true;
+ }
+ goto fail;
+ }
+
+ if (qemu_iovec_is_zero(&qiov)) {
+ ret = blk_co_pwrite_zeroes(job->target, start,
+ qiov.size, BDRV_REQ_MAY_UNMAP);
+ } else {
+ ret = blk_co_pwritev(job->target, start,
+ qiov.size, &qiov,
+ job->compress ? BDRV_REQ_WRITE_COMPRESSED : 0);
+ }
+ if (ret < 0) {
+ trace_backup_do_cow_write_fail(job, start, ret);
+ if (error_is_read) {
+ *error_is_read = false;
+ }
+ goto fail;
+ }
+
+ return nbytes;
+fail:
+ hbitmap_set(job->copy_bitmap, start / job->cluster_size, 1);
+ return ret;
+
+}
+
+/* Copy range to target and return the bytes copied. If error occured, return a
+ * negative error number. */
+static int coroutine_fn backup_cow_with_offload(BackupBlockJob *job,
+ int64_t start,
+ int64_t end,
+ bool is_write_notifier)
+{
+ int ret;
+ int nr_clusters;
+ BlockBackend *blk = job->common.blk;
+ int nbytes;
+
+ assert(QEMU_IS_ALIGNED(job->copy_range_size, job->cluster_size));
+ nbytes = MIN(job->copy_range_size, end - start);
+ nr_clusters = DIV_ROUND_UP(nbytes, job->cluster_size);
+ hbitmap_reset(job->copy_bitmap, start / job->cluster_size,
+ nr_clusters);
+ ret = blk_co_copy_range(blk, start, job->target, start, nbytes,
+ is_write_notifier ? BDRV_REQ_NO_SERIALISING : 0);
+ if (ret < 0) {
+ trace_backup_do_cow_copy_range_fail(job, start, ret);
+ hbitmap_set(job->copy_bitmap, start / job->cluster_size,
+ nr_clusters);
+ return ret;
+ }
+
+ return nbytes;
+}
+
static int coroutine_fn backup_do_cow(BackupBlockJob *job,
int64_t offset, uint64_t bytes,
bool *error_is_read,
bool is_write_notifier)
{
- BlockBackend *blk = job->common.blk;
CowRequest cow_request;
- struct iovec iov;
- QEMUIOVector bounce_qiov;
- void *bounce_buffer = NULL;
int ret = 0;
int64_t start, end; /* bytes */
- int n; /* bytes */
+ void *bounce_buffer = NULL;
qemu_co_rwlock_rdlock(&job->flush_rwlock);
@@ -110,60 +194,38 @@
wait_for_overlapping_requests(job, start, end);
cow_request_begin(&cow_request, job, start, end);
- for (; start < end; start += job->cluster_size) {
+ while (start < end) {
if (!hbitmap_get(job->copy_bitmap, start / job->cluster_size)) {
trace_backup_do_cow_skip(job, start);
+ start += job->cluster_size;
continue; /* already copied */
}
- hbitmap_reset(job->copy_bitmap, start / job->cluster_size, 1);
trace_backup_do_cow_process(job, start);
- n = MIN(job->cluster_size, job->len - start);
-
- if (!bounce_buffer) {
- bounce_buffer = blk_blockalign(blk, job->cluster_size);
- }
- iov.iov_base = bounce_buffer;
- iov.iov_len = n;
- qemu_iovec_init_external(&bounce_qiov, &iov, 1);
-
- ret = blk_co_preadv(blk, start, bounce_qiov.size, &bounce_qiov,
- is_write_notifier ? BDRV_REQ_NO_SERIALISING : 0);
- if (ret < 0) {
- trace_backup_do_cow_read_fail(job, start, ret);
- if (error_is_read) {
- *error_is_read = true;
+ if (job->use_copy_range) {
+ ret = backup_cow_with_offload(job, start, end, is_write_notifier);
+ if (ret < 0) {
+ job->use_copy_range = false;
}
- hbitmap_set(job->copy_bitmap, start / job->cluster_size, 1);
- goto out;
}
-
- if (buffer_is_zero(iov.iov_base, iov.iov_len)) {
- ret = blk_co_pwrite_zeroes(job->target, start,
- bounce_qiov.size, BDRV_REQ_MAY_UNMAP);
- } else {
- ret = blk_co_pwritev(job->target, start,
- bounce_qiov.size, &bounce_qiov,
- job->compress ? BDRV_REQ_WRITE_COMPRESSED : 0);
+ if (!job->use_copy_range) {
+ ret = backup_cow_with_bounce_buffer(job, start, end, is_write_notifier,
+ error_is_read, &bounce_buffer);
}
if (ret < 0) {
- trace_backup_do_cow_write_fail(job, start, ret);
- if (error_is_read) {
- *error_is_read = false;
- }
- hbitmap_set(job->copy_bitmap, start / job->cluster_size, 1);
- goto out;
+ break;
}
/* Publish progress, guest I/O counts as progress too. Note that the
* offset field is an opaque progress value, it is not a disk offset.
*/
- job->bytes_read += n;
- job_progress_update(&job->common.job, n);
+ start += ret;
+ job->bytes_read += ret;
+ job_progress_update(&job->common.job, ret);
+ ret = 0;
}
-out:
if (bounce_buffer) {
qemu_vfree(bounce_buffer);
}
@@ -665,6 +727,12 @@
} else {
job->cluster_size = MAX(BACKUP_CLUSTER_SIZE_DEFAULT, bdi.cluster_size);
}
+ job->use_copy_range = true;
+ job->copy_range_size = MIN_NON_ZERO(blk_get_max_transfer(job->common.blk),
+ blk_get_max_transfer(job->target));
+ job->copy_range_size = MAX(job->cluster_size,
+ QEMU_ALIGN_UP(job->copy_range_size,
+ job->cluster_size));
/* Required permissions are already taken with target's blk_new() */
block_job_add_bdrv(&job->common, "target", target, 0, BLK_PERM_ALL,
diff --git a/block/io.c b/block/io.c
index 7035b78..1a2272f 100644
--- a/block/io.c
+++ b/block/io.c
@@ -2897,18 +2897,11 @@
bool recurse_src)
{
BdrvTrackedRequest src_req, dst_req;
- BlockDriverState *src_bs = src->bs;
- BlockDriverState *dst_bs = dst->bs;
int ret;
- if (!src || !dst || !src->bs || !dst->bs) {
+ if (!dst || !dst->bs) {
return -ENOMEDIUM;
}
- ret = bdrv_check_byte_request(src->bs, src_offset, bytes);
- if (ret) {
- return ret;
- }
-
ret = bdrv_check_byte_request(dst->bs, dst_offset, bytes);
if (ret) {
return ret;
@@ -2917,20 +2910,30 @@
return bdrv_co_pwrite_zeroes(dst, dst_offset, bytes, flags);
}
+ if (!src || !src->bs) {
+ return -ENOMEDIUM;
+ }
+ ret = bdrv_check_byte_request(src->bs, src_offset, bytes);
+ if (ret) {
+ return ret;
+ }
+
if (!src->bs->drv->bdrv_co_copy_range_from
|| !dst->bs->drv->bdrv_co_copy_range_to
|| src->bs->encrypted || dst->bs->encrypted) {
return -ENOTSUP;
}
- bdrv_inc_in_flight(src_bs);
- bdrv_inc_in_flight(dst_bs);
- tracked_request_begin(&src_req, src_bs, src_offset,
+ bdrv_inc_in_flight(src->bs);
+ bdrv_inc_in_flight(dst->bs);
+ tracked_request_begin(&src_req, src->bs, src_offset,
bytes, BDRV_TRACKED_READ);
- tracked_request_begin(&dst_req, dst_bs, dst_offset,
+ tracked_request_begin(&dst_req, dst->bs, dst_offset,
bytes, BDRV_TRACKED_WRITE);
- wait_serialising_requests(&src_req);
- wait_serialising_requests(&dst_req);
+ if (!(flags & BDRV_REQ_NO_SERIALISING)) {
+ wait_serialising_requests(&src_req);
+ wait_serialising_requests(&dst_req);
+ }
if (recurse_src) {
ret = src->bs->drv->bdrv_co_copy_range_from(src->bs,
src, src_offset,
@@ -2944,8 +2947,8 @@
}
tracked_request_end(&src_req);
tracked_request_end(&dst_req);
- bdrv_dec_in_flight(src_bs);
- bdrv_dec_in_flight(dst_bs);
+ bdrv_dec_in_flight(src->bs);
+ bdrv_dec_in_flight(dst->bs);
return ret;
}
diff --git a/block/iscsi.c b/block/iscsi.c
index 9beb06d..ead2bd5 100644
--- a/block/iscsi.c
+++ b/block/iscsi.c
@@ -734,7 +734,7 @@
goto out_unlock;
}
- *pnum = lbasd->num_blocks * iscsilun->block_size;
+ *pnum = (int64_t) lbasd->num_blocks * iscsilun->block_size;
if (lbasd->provisioning == SCSI_PROVISIONING_TYPE_DEALLOCATED ||
lbasd->provisioning == SCSI_PROVISIONING_TYPE_ANCHORED) {
diff --git a/block/nbd-client.c b/block/nbd-client.c
index 8d69eaa..9686ecb 100644
--- a/block/nbd-client.c
+++ b/block/nbd-client.c
@@ -970,6 +970,7 @@
const char *export,
QCryptoTLSCreds *tlscreds,
const char *hostname,
+ const char *x_dirty_bitmap,
Error **errp)
{
NBDClientSession *client = nbd_get_client_session(bs);
@@ -982,9 +983,11 @@
client->info.request_sizes = true;
client->info.structured_reply = true;
client->info.base_allocation = true;
+ client->info.x_dirty_bitmap = g_strdup(x_dirty_bitmap);
ret = nbd_receive_negotiate(QIO_CHANNEL(sioc), export,
tlscreds, hostname,
&client->ioc, &client->info, errp);
+ g_free(client->info.x_dirty_bitmap);
if (ret < 0) {
logout("Failed to negotiate with the NBD server\n");
return ret;
diff --git a/block/nbd-client.h b/block/nbd-client.h
index 0ece76e..cfc9055 100644
--- a/block/nbd-client.h
+++ b/block/nbd-client.h
@@ -45,6 +45,7 @@
const char *export_name,
QCryptoTLSCreds *tlscreds,
const char *hostname,
+ const char *x_dirty_bitmap,
Error **errp);
void nbd_client_close(BlockDriverState *bs);
diff --git a/block/nbd.c b/block/nbd.c
index 13db403..b198ad7 100644
--- a/block/nbd.c
+++ b/block/nbd.c
@@ -378,6 +378,12 @@
.type = QEMU_OPT_STRING,
.help = "ID of the TLS credentials to use",
},
+ {
+ .name = "x-dirty-bitmap",
+ .type = QEMU_OPT_STRING,
+ .help = "experimental: expose named dirty bitmap in place of "
+ "block status",
+ },
{ /* end of list */ }
},
};
@@ -438,8 +444,8 @@
}
/* NBD handshake */
- ret = nbd_client_init(bs, sioc, s->export,
- tlscreds, hostname, errp);
+ ret = nbd_client_init(bs, sioc, s->export, tlscreds, hostname,
+ qemu_opt_get(opts, "x-dirty-bitmap"), errp);
error:
if (sioc) {
object_unref(OBJECT(sioc));
diff --git a/block/trace-events b/block/trace-events
index 2d59b53..c35287b 100644
--- a/block/trace-events
+++ b/block/trace-events
@@ -42,6 +42,7 @@
backup_do_cow_process(void *job, int64_t start) "job %p start %"PRId64
backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
+backup_do_cow_copy_range_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
# blockdev.c
qmp_block_job_cancel(void *job) "job %p"
diff --git a/block/vdi.c b/block/vdi.c
index 1d8ed67..6555cff 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -50,6 +50,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qapi/qobject-input-visitor.h"
#include "qapi/qapi-visit-block-core.h"
@@ -83,9 +84,6 @@
/* Command line option for static images. */
#define BLOCK_OPT_STATIC "static"
-#define KiB 1024
-#define MiB (KiB * KiB)
-
#define SECTOR_SIZE 512
#define DEFAULT_CLUSTER_SIZE (1 * MiB)
@@ -434,7 +432,8 @@
goto fail;
} else if (header.block_size != DEFAULT_CLUSTER_SIZE) {
error_setg(errp, "unsupported VDI image (block size %" PRIu32
- " is not %u)", header.block_size, DEFAULT_CLUSTER_SIZE);
+ " is not %" PRIu64 ")",
+ header.block_size, DEFAULT_CLUSTER_SIZE);
ret = -ENOTSUP;
goto fail;
} else if (header.disk_size >
diff --git a/blockdev.c b/blockdev.c
index 58d7570..72f5347 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1859,7 +1859,7 @@
assert(common->action->type == TRANSACTION_ACTION_KIND_BLOCKDEV_BACKUP);
backup = common->action->u.blockdev_backup.data;
- bs = qmp_get_root_bs(backup->device, errp);
+ bs = bdrv_lookup_bs(backup->device, backup->device, errp);
if (!bs) {
return;
}
@@ -3517,7 +3517,7 @@
backup->compress = false;
}
- bs = qmp_get_root_bs(backup->device, errp);
+ bs = bdrv_lookup_bs(backup->device, backup->device, errp);
if (!bs) {
return NULL;
}
diff --git a/bsd-user/main.c b/bsd-user/main.c
index da3b833..0d31569 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -17,6 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-version.h"
#include <machine/trap.h>
@@ -795,9 +796,9 @@
if (x86_stack_size <= 0)
usage();
if (*r == 'M')
- x86_stack_size *= 1024 * 1024;
+ x86_stack_size *= MiB;
else if (*r == 'k' || *r == 'K')
- x86_stack_size *= 1024;
+ x86_stack_size *= KiB;
} else if (!strcmp(r, "L")) {
interp_prefix = argv[optind++];
} else if (!strcmp(r, "p")) {
diff --git a/chardev/char-serial.c b/chardev/char-serial.c
index ae548d2..3299b46 100644
--- a/chardev/char-serial.c
+++ b/chardev/char-serial.c
@@ -265,7 +265,8 @@
ChardevHostdev *serial = backend->u.serial.data;
int fd;
- fd = qmp_chardev_open_file_source(serial->device, O_RDWR, errp);
+ fd = qmp_chardev_open_file_source(serial->device, O_RDWR | O_NONBLOCK,
+ errp);
if (fd < 0) {
return;
}
diff --git a/configure b/configure
index 65548df..dcb605d 100755
--- a/configure
+++ b/configure
@@ -300,6 +300,24 @@
else
git_update=no
git_submodules=""
+
+ if ! test -f "$source_path/ui/keycodemapdb/README"
+ then
+ echo
+ echo "ERROR: missing file $source_path/ui/keycodemapdb/README"
+ echo
+ echo "This is not a GIT checkout but module content appears to"
+ echo "be missing. Do not use 'git archive' or GitHub download links"
+ echo "to acquire QEMU source archives. Non-GIT builds are only"
+ echo "supported with source archives linked from:"
+ echo
+ echo " https://www.qemu.org/download/"
+ echo
+ echo "Developers working with GIT can use scripts/archive-source.sh"
+ echo "if they need to create valid source archives."
+ echo
+ exit 1
+ fi
fi
git="git"
diff --git a/exec.c b/exec.c
index ee72688..4f5df07 100644
--- a/exec.c
+++ b/exec.c
@@ -1027,7 +1027,7 @@
return cpu_type;
}
-#if defined(CONFIG_USER_ONLY) || !defined(CONFIG_TCG)
+#if defined(CONFIG_USER_ONLY)
void tb_invalidate_phys_addr(target_ulong addr)
{
mmap_lock();
@@ -1046,6 +1046,10 @@
MemoryRegion *mr;
hwaddr l = 1;
+ if (!tcg_enabled()) {
+ return;
+ }
+
rcu_read_lock();
mr = address_space_translate(as, addr, &addr, &l, false, attrs);
if (!(memory_region_is_ram(mr)
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index d3ed7cd..d74b5b5 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -7,6 +7,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -813,8 +814,6 @@
qemu_irq *p_rtc_irq,
AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq)
{
- const uint64_t MB = 1024 * 1024;
- const uint64_t GB = 1024 * MB;
MemoryRegion *addr_space = get_system_memory();
DeviceState *dev;
TyphoonState *s;
@@ -855,30 +854,30 @@
/* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x80180000000ULL,
&s->pchip.region);
/* Cchip CSRs, 0x801.A000.0000, 256MB. */
memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x801a0000000ULL,
&s->cchip.region);
/* Dchip CSRs, 0x801.B000.0000, 256MB. */
memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x801b0000000ULL,
&s->dchip_region);
/* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
- memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4*GB);
+ memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4 * GiB);
memory_region_add_subregion(addr_space, 0x80000000000ULL,
&s->pchip.reg_mem);
/* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */
memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_ops,
- NULL, "pci0-io", 32*MB);
+ NULL, "pci0-io", 32 * MiB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
@@ -899,13 +898,13 @@
/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops,
- b, "pci0-iack", 64*MB);
+ b, "pci0-iack", 64 * MiB);
memory_region_add_subregion(addr_space, 0x801f8000000ULL,
&s->pchip.reg_iack);
/* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops,
- b, "pci0-conf", 16*MB);
+ b, "pci0-conf", 16 * MiB);
memory_region_add_subregion(addr_space, 0x801fe000000ULL,
&s->pchip.reg_conf);
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 75c44ad..edb3ba8 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -23,13 +23,13 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "hw/char/serial.h"
#include "hw/boards.h"
-#include "qemu/cutils.h"
#include "hw/arm/msf2-soc.h"
#include "hw/misc/unimp.h"
@@ -40,14 +40,14 @@
#define SRAM_BASE_ADDRESS 0x20000000
-#define MSF2_ENVM_MAX_SIZE (512 * K_BYTE)
+#define MSF2_ENVM_MAX_SIZE (512 * KiB)
/*
* eSRAM max size is 80k without SECDED(Single error correction and
* dual error detection) feature and 64k with SECDED.
* We do not support SECDED now.
*/
-#define MSF2_ESRAM_MAX_SIZE (80 * K_BYTE)
+#define MSF2_ESRAM_MAX_SIZE (80 * KiB)
static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x40000000 , 0x40010000 };
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 0795a3a..2432b5e 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -23,20 +23,20 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#include "hw/arm/msf2-soc.h"
#include "cpu.h"
#define DDR_BASE_ADDRESS 0xA0000000
-#define DDR_SIZE (64 * M_BYTE)
+#define DDR_SIZE (64 * MiB)
-#define M2S010_ENVM_SIZE (256 * K_BYTE)
-#define M2S010_ESRAM_SIZE (64 * K_BYTE)
+#define M2S010_ENVM_SIZE (256 * KiB)
+#define M2S010_ESRAM_SIZE (64 * KiB)
static void emcraft_sf2_s2s010_init(MachineState *machine)
{
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index b0ed8fa..e8dfa14 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -22,6 +22,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "sysemu/block-backend.h"
#include "hw/ssi/ssi.h"
@@ -541,12 +542,12 @@
switch (cmd) {
case ERASE_4K:
case ERASE4_4K:
- len = 4 << 10;
+ len = 4 * KiB;
capa_to_assert = ER_4K;
break;
case ERASE_32K:
case ERASE4_32K:
- len = 32 << 10;
+ len = 32 * KiB;
capa_to_assert = ER_32K;
break;
case ERASE_SECTOR:
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 156ecf3..fc7dacb 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/block/block.h"
#include "hw/hw.h"
#include "hw/pci/msix.h"
@@ -649,7 +650,7 @@
static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeIdentify *c)
{
- static const int data_len = 4096;
+ static const int data_len = 4 * KiB;
uint32_t min_nsid = le32_to_cpu(c->nsid);
uint64_t prp1 = le64_to_cpu(c->prp1);
uint64_t prp2 = le64_to_cpu(c->prp2);
diff --git a/hw/block/tc58128.c b/hw/block/tc58128.c
index 1d9f7ee..808ad76 100644
--- a/hw/block/tc58128.c
+++ b/hw/block/tc58128.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/sh4/sh.h"
#include "hw/loader.h"
@@ -26,7 +27,7 @@
static tc58128_dev tc58128_devs[2];
-#define FLASH_SIZE (16*1024*1024)
+#define FLASH_SIZE (16 * MiB)
static void init_dev(tc58128_dev * dev, const char *filename)
{
diff --git a/hw/block/xen_disk.c b/hw/block/xen_disk.c
index 9fbc0cd..36eff94 100644
--- a/hw/block/xen_disk.c
+++ b/hw/block/xen_disk.c
@@ -20,6 +20,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <sys/ioctl.h>
#include <sys/uio.h>
@@ -814,7 +815,7 @@
xen_pv_printf(xendev, 1, "type \"%s\", fileproto \"%s\", filename \"%s\","
" size %" PRId64 " (%" PRId64 " MB)\n",
blkdev->type, blkdev->fileproto, blkdev->filename,
- blkdev->file_size, blkdev->file_size >> 20);
+ blkdev->file_size, blkdev->file_size / MiB);
/* Fill in number of sector size and number of sectors */
xenstore_write_be_int(xendev, "sector-size", blkdev->file_blk);
diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c
index 6387854..447f608 100644
--- a/hw/core/loader-fit.c
+++ b/hw/core/loader-fit.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "exec/memory.h"
#include "hw/loader.h"
#include "hw/loader-fit.h"
@@ -194,7 +195,7 @@
err = fit_image_addr(itb, img_off, "load", &load_addr);
if (err == -ENOENT) {
- load_addr = ROUND_UP(kernel_end, 64 * K_BYTE) + (10 * M_BYTE);
+ load_addr = ROUND_UP(kernel_end, 64 * KiB) + (10 * MiB);
} else if (err) {
ret = err;
goto out;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 617e5f8..2077328 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "qapi/error.h"
#include "qapi/qapi-visit-common.h"
@@ -19,7 +20,6 @@
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
#include "qemu/error-report.h"
-#include "qemu/cutils.h"
#include "sysemu/qtest.h"
static char *machine_get_accel(Object *obj, Error **errp)
@@ -522,7 +522,7 @@
MachineClass *mc = MACHINE_CLASS(oc);
/* Default 128 MB as guest ram size */
- mc->default_ram_size = 128 * M_BYTE;
+ mc->default_ram_size = 128 * MiB;
mc->rom_file_has_mr = true;
/* numa node memory size aligned on 8MB by default.
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 56ee398..191292e 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -242,7 +243,7 @@
},
};
-#define INTMEM_SIZE (128 * 1024)
+#define INTMEM_SIZE (128 * KiB)
static struct cris_load_info li;
diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c
index 12d8a66..09d8944 100644
--- a/hw/display/bochs-display.c
+++ b/hw/display/bochs-display.c
@@ -5,6 +5,7 @@
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "hw/display/bochs-vbe.h"
@@ -70,7 +71,7 @@
case VBE_DISPI_INDEX_ID:
return VBE_DISPI_ID5;
case VBE_DISPI_INDEX_VIDEO_MEMORY_64K:
- return s->vgamem / (64 * 1024);
+ return s->vgamem / (64 * KiB);
}
if (index >= ARRAY_SIZE(s->vbe_regs)) {
@@ -258,10 +259,10 @@
s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s);
- if (s->vgamem < (4 * 1024 * 1024)) {
+ if (s->vgamem < 4 * MiB) {
error_setg(errp, "bochs-display: video memory too small");
}
- if (s->vgamem > (256 * 1024 * 1024)) {
+ if (s->vgamem > 256 * MiB) {
error_setg(errp, "bochs-display: video memory too big");
}
s->vgamem = pow2ceil(s->vgamem);
@@ -323,7 +324,7 @@
}
static Property bochs_display_properties[] = {
- DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * 1024 * 1024),
+ DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 138ae96..5e44f00 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -27,6 +27,7 @@
* available at http://home.worldonline.dk/~finth/
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "trace.h"
#include "hw/hw.h"
@@ -2218,7 +2219,7 @@
uint32_t content;
int y, y_min, y_max;
- src = s->vga.vram_ptr + s->real_vram_size - 16 * 1024;
+ src = s->vga.vram_ptr + s->real_vram_size - 16 * KiB;
if (s->vga.sr[0x12] & CIRRUS_CURSOR_LARGE) {
src += (s->vga.sr[0x13] & 0x3c) * 256;
y_min = 64;
@@ -2347,7 +2348,7 @@
return;
}
- src = s->vga.vram_ptr + s->real_vram_size - 16 * 1024;
+ src = s->vga.vram_ptr + s->real_vram_size - 16 * KiB;
if (s->vga.sr[0x12] & CIRRUS_CURSOR_LARGE) {
src += (s->vga.sr[0x13] & 0x3c) * 256;
src += (scr_y - s->vga.hw_cursor_y) * 16;
@@ -2995,8 +2996,7 @@
/* I/O handler for LFB */
memory_region_init_io(&s->cirrus_linear_io, owner, &cirrus_linear_io_ops, s,
- "cirrus-linear-io", s->vga.vram_size_mb
- * 1024 * 1024);
+ "cirrus-linear-io", s->vga.vram_size_mb * MiB);
memory_region_set_flush_coalesced(&s->cirrus_linear_io);
/* I/O handler for LFB */
@@ -3013,7 +3013,7 @@
memory_region_set_flush_coalesced(&s->cirrus_mmio_io);
s->real_vram_size =
- (s->device_id == CIRRUS_ID_CLGD5446) ? 4096 * 1024 : 2048 * 1024;
+ (s->device_id == CIRRUS_ID_CLGD5446) ? 4 * MiB : 2 * MiB;
/* XXX: s->vga.vram_size must be a power of two */
s->cirrus_addr_mask = s->real_vram_size - 1;
diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c
index 3d75394..fbc2b24 100644
--- a/hw/display/g364fb.c
+++ b/hw/display/g364fb.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "ui/console.h"
@@ -510,8 +511,7 @@
}
static Property g364fb_sysbus_properties[] = {
- DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size,
- 8 * 1024 * 1024),
+ DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index a71714c..b09a039 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <zlib.h>
#include "qapi/error.h"
@@ -2012,11 +2013,11 @@
if (qxl->vgamem_size_mb > 256) {
qxl->vgamem_size_mb = 256;
}
- qxl->vgamem_size = qxl->vgamem_size_mb * 1024 * 1024;
+ qxl->vgamem_size = qxl->vgamem_size_mb * MiB;
/* vga ram (bar 0, total) */
if (qxl->ram_size_mb != -1) {
- qxl->vga.vram_size = qxl->ram_size_mb * 1024 * 1024;
+ qxl->vga.vram_size = qxl->ram_size_mb * MiB;
}
if (qxl->vga.vram_size < qxl->vgamem_size * 2) {
qxl->vga.vram_size = qxl->vgamem_size * 2;
@@ -2024,7 +2025,7 @@
/* vram32 (surfaces, 32bit, bar 1) */
if (qxl->vram32_size_mb != -1) {
- qxl->vram32_size = qxl->vram32_size_mb * 1024 * 1024;
+ qxl->vram32_size = qxl->vram32_size_mb * MiB;
}
if (qxl->vram32_size < 4096) {
qxl->vram32_size = 4096;
@@ -2032,7 +2033,7 @@
/* vram (surfaces, 64bit, bar 4+5) */
if (qxl->vram_size_mb != -1) {
- qxl->vram_size = (uint64_t)qxl->vram_size_mb * 1024 * 1024;
+ qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
}
if (qxl->vram_size < qxl->vram32_size) {
qxl->vram_size = qxl->vram32_size;
@@ -2134,13 +2135,12 @@
}
/* print pci bar details */
- dprint(qxl, 1, "ram/%s: %d MB [region 0]\n",
- qxl->id == 0 ? "pri" : "sec",
- qxl->vga.vram_size / (1024*1024));
- dprint(qxl, 1, "vram/32: %" PRIx64 "d MB [region 1]\n",
- qxl->vram32_size / (1024*1024));
- dprint(qxl, 1, "vram/64: %" PRIx64 "d MB %s\n",
- qxl->vram_size / (1024*1024),
+ dprint(qxl, 1, "ram/%s: %" PRId64 " MB [region 0]\n",
+ qxl->id == 0 ? "pri" : "sec", qxl->vga.vram_size / MiB);
+ dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
+ qxl->vram32_size / MiB);
+ dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
+ qxl->vram_size / MiB,
qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
qxl->ssd.qxl.base.sif = &qxl_interface.base;
@@ -2167,7 +2167,7 @@
qxl->id = 0;
qxl_init_ramsize(qxl);
vga->vbe_size = qxl->vgamem_size;
- vga->vram_size_mb = qxl->vga.vram_size >> 20;
+ vga->vram_size_mb = qxl->vga.vram_size / MiB;
vga_common_init(vga, OBJECT(dev), true);
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
@@ -2391,10 +2391,8 @@
};
static Property qxl_properties[] = {
- DEFINE_PROP_UINT32("ram_size", PCIQXLDevice, vga.vram_size,
- 64 * 1024 * 1024),
- DEFINE_PROP_UINT64("vram_size", PCIQXLDevice, vram32_size,
- 64 * 1024 * 1024),
+ DEFINE_PROP_UINT32("ram_size", PCIQXLDevice, vga.vram_size, 64 * MiB),
+ DEFINE_PROP_UINT64("vram_size", PCIQXLDevice, vram32_size, 64 * MiB),
DEFINE_PROP_UINT32("revision", PCIQXLDevice, revision,
QXL_DEFAULT_REVISION),
DEFINE_PROP_UINT32("debug", PCIQXLDevice, debug, 0),
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 8206ae8..9dec0d3 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -24,7 +24,7 @@
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -452,12 +452,12 @@
/* SM501 local memory size taken from "linux/drivers/mfd/sm501.c" */
static const uint32_t sm501_mem_local_size[] = {
- [0] = 4 * M_BYTE,
- [1] = 8 * M_BYTE,
- [2] = 16 * M_BYTE,
- [3] = 32 * M_BYTE,
- [4] = 64 * M_BYTE,
- [5] = 2 * M_BYTE,
+ [0] = 4 * MiB,
+ [1] = 8 * MiB,
+ [2] = 16 * MiB,
+ [3] = 32 * MiB,
+ [4] = 64 * MiB,
+ [5] = 2 * MiB,
};
#define get_local_mem_size(s) sm501_mem_local_size[(s)->local_mem_size_index]
@@ -1829,7 +1829,7 @@
}
static Property sm501_pci_properties[] = {
- DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * M_BYTE),
+ DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c
index e887b45..bd58141 100644
--- a/hw/display/vga-isa-mm.c
+++ b/hw/display/vga-isa-mm.c
@@ -22,12 +22,13 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/display/vga.h"
#include "vga_int.h"
#include "ui/pixel_ops.h"
-#define VGA_RAM_SIZE (8192 * 1024)
+#define VGA_RAM_SIZE (8 * MiB)
typedef struct ISAVGAMMState {
VGACommonState vga;
@@ -130,7 +131,7 @@
s = g_malloc0(sizeof(*s));
- s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
+ s->vga.vram_size_mb = VGA_RAM_SIZE / MiB;
vga_common_init(&s->vga, NULL, true);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index ed476e4..d759918 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/display/vga.h"
@@ -721,7 +722,7 @@
val = s->vbe_regs[s->vbe_index];
}
} else if (s->vbe_index == VBE_DISPI_INDEX_VIDEO_MEMORY_64K) {
- val = s->vbe_size / (64 * 1024);
+ val = s->vbe_size / (64 * KiB);
} else {
val = 0;
}
@@ -2192,7 +2193,7 @@
s->vram_size_mb = uint_clamp(s->vram_size_mb, 1, 512);
s->vram_size_mb = pow2ceil(s->vram_size_mb);
- s->vram_size = s->vram_size_mb << 20;
+ s->vram_size = s->vram_size_mb * MiB;
if (!s->vbe_size) {
s->vbe_size = s->vram_size;
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index 2dd3c34..71a0071 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -12,6 +12,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "qemu/iov.h"
#include "ui/console.h"
@@ -1314,8 +1315,7 @@
static Property virtio_gpu_properties[] = {
DEFINE_PROP_UINT32("max_outputs", VirtIOGPU, conf.max_outputs, 1),
- DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem,
- 256 * 1024 * 1024),
+ DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem, 256 * MiB),
#ifdef CONFIG_VIRGL
DEFINE_PROP_BIT("virgl", VirtIOGPU, conf.flags,
VIRTIO_GPU_FLAG_VIRGL_ENABLED, true),
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index bd3e8b3..08deb08 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/loader.h"
@@ -565,7 +566,7 @@
s->fifo_next >= SVGA_FIFO_SIZE) {
return 0;
}
- if (s->fifo_max < s->fifo_min + 10 * 1024) {
+ if (s->fifo_max < s->fifo_min + 10 * KiB) {
return 0;
}
diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c
index 911291c..0330dc6 100644
--- a/hw/display/xenfb.c
+++ b/hw/display/xenfb.c
@@ -25,6 +25,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "ui/input.h"
@@ -889,7 +890,7 @@
return rc;
fb_page = fb->c.page;
- rc = xenfb_configure_fb(fb, videoram * 1024 * 1024U,
+ rc = xenfb_configure_fb(fb, videoram * MiB,
fb_page->width, fb_page->height, fb_page->depth,
fb_page->mem_length, 0, fb_page->line_length);
if (rc != 0)
diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c
index 26f2704..564b938 100644
--- a/hw/hppa/dino.c
+++ b/hw/hppa/dino.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -76,7 +77,7 @@
/* #define xxx 0x200 - bit 9 not used */
#define RS232INT 0x400
-#define DINO_MEM_CHUNK_SIZE (8 * 1024 * 1024) /* 8MB */
+#define DINO_MEM_CHUNK_SIZE (8 * MiB)
#define DINO_PCI_HOST_BRIDGE(obj) \
OBJECT_CHECK(DinoState, (obj), TYPE_DINO_PCI_HOST_BRIDGE)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index aba269b..cf7c61c 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -17,7 +17,7 @@
#include "hw/timer/i8254.h"
#include "hw/char/serial.h"
#include "hppa_sys.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/log.h"
@@ -178,8 +178,8 @@
}
qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
"-0x%08" PRIx64 ", entry at 0x%08" PRIx64
- ", size %ld kB.\n",
- kernel_low, kernel_high, kernel_entry, size / 1024);
+ ", size %" PRIu64 " kB\n",
+ kernel_low, kernel_high, kernel_entry, size / KiB);
if (kernel_cmdline) {
cpu[0]->env.gr[24] = 0x4000;
@@ -203,8 +203,8 @@
(1) Due to sign-extension problems and PDC,
put the initrd no higher than 1G.
(2) Reserve 64k for stack. */
- initrd_base = MIN(ram_size, 1024 * 1024 * 1024);
- initrd_base = initrd_base - 64 * 1024;
+ initrd_base = MIN(ram_size, 1 * GiB);
+ initrd_base = initrd_base - 64 * KiB;
initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
if (initrd_base < kernel_high) {
@@ -275,7 +275,7 @@
mc->max_cpus = HPPA_MAX_CPUS;
mc->default_cpus = 1;
mc->is_default = 1;
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
mc->default_boot_order = "cd";
}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 9bc6d97..9e8350c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2248,8 +2248,8 @@
(void *)tpm2_ptr, "TPM2", sizeof(*tpm2_ptr), 4, NULL, NULL);
}
-#define HOLE_640K_START (640 * 1024)
-#define HOLE_640K_END (1024 * 1024)
+#define HOLE_640K_START (640 * KiB)
+#define HOLE_640K_END (1 * MiB)
static void build_srat_hotpluggable_memory(GArray *table_data, uint64_t base,
uint64_t len, int default_node)
@@ -2537,7 +2537,7 @@
(1UL << 7), /* PPRSup */
1);
/* IVHD length */
- build_append_int_noprefix(table_data, 0x24, 2);
+ build_append_int_noprefix(table_data, 28, 2);
/* DeviceID */
build_append_int_noprefix(table_data, s->devid, 2);
/* Capability offset */
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index aeef802..8740305 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -165,8 +165,8 @@
#define AMDVI_DTE_UPPER_QUAD_RESERVED 0x08f0000000000000
/* AMDVI paging mode */
-#define AMDVI_GATS_MODE (6ULL << 12)
-#define AMDVI_HATS_MODE (6ULL << 10)
+#define AMDVI_GATS_MODE (2ULL << 12)
+#define AMDVI_HATS_MODE (2ULL << 10)
/* IOTLB */
#define AMDVI_IOTLB_MAX_SIZE 1024
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f310040..50d5553 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
@@ -448,12 +449,12 @@
/* memory size */
/* base memory (first MiB) */
- val = MIN(pcms->below_4g_mem_size / 1024, 640);
+ val = MIN(pcms->below_4g_mem_size / KiB, 640);
rtc_set_memory(s, 0x15, val);
rtc_set_memory(s, 0x16, val >> 8);
/* extended memory (next 64MiB) */
- if (pcms->below_4g_mem_size > 1024 * 1024) {
- val = (pcms->below_4g_mem_size - 1024 * 1024) / 1024;
+ if (pcms->below_4g_mem_size > 1 * MiB) {
+ val = (pcms->below_4g_mem_size - 1 * MiB) / KiB;
} else {
val = 0;
}
@@ -464,8 +465,8 @@
rtc_set_memory(s, 0x30, val);
rtc_set_memory(s, 0x31, val >> 8);
/* memory between 16MiB and 4GiB */
- if (pcms->below_4g_mem_size > 16 * 1024 * 1024) {
- val = (pcms->below_4g_mem_size - 16 * 1024 * 1024) / 65536;
+ if (pcms->below_4g_mem_size > 16 * MiB) {
+ val = (pcms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
} else {
val = 0;
}
@@ -1392,11 +1393,11 @@
}
machine->device_memory->base =
- ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1ULL << 30);
+ ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1 * GiB);
if (pcmc->enforce_aligned_dimm) {
/* size device region assuming 1G page max alignment per slot */
- device_mem_size += (1ULL << 30) * machine->ram_slots;
+ device_mem_size += (1 * GiB) * machine->ram_slots;
}
if ((machine->device_memory->base + device_mem_size) <
@@ -1438,7 +1439,7 @@
if (!pcmc->broken_reserved_end) {
res_mem_end += memory_region_size(&machine->device_memory->mr);
}
- *val = cpu_to_le64(ROUND_UP(res_mem_end, 0x1ULL << 30));
+ *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB));
fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val));
}
@@ -1475,7 +1476,7 @@
hole64_start = 0x100000000ULL + pcms->above_4g_mem_size;
}
- return ROUND_UP(hole64_start, 1ULL << 30);
+ return ROUND_UP(hole64_start, 1 * GiB);
}
qemu_irq pc_allocate_cpu_irq(void)
@@ -2095,7 +2096,7 @@
error_propagate(errp, error);
return;
}
- if (value > (1ULL << 32)) {
+ if (value > 4 * GiB) {
error_setg(&error,
"Machine option 'max-ram-below-4g=%"PRIu64
"' expects size less than or equal to 4G", value);
@@ -2103,7 +2104,7 @@
return;
}
- if (value < (1ULL << 20)) {
+ if (value < 1 * MiB) {
warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary,"
"BIOS may not work with less than 1MiB", value);
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index d357907..dc09466 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/loader.h"
#include "hw/i386/pc.h"
@@ -131,7 +132,7 @@
if (lowmem > 0xc0000000) {
lowmem = 0xc0000000;
}
- if (lowmem & ((1ULL << 30) - 1)) {
+ if (lowmem & (1 * GiB - 1)) {
warn_report("Large machine and max_ram_below_4g "
"(%" PRIu64 ") not a multiple of 1G; "
"possible bad performance.",
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 1a73e18..532241e 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -29,6 +29,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/loader.h"
#include "sysemu/arch_init.h"
@@ -105,7 +106,7 @@
if (lowmem > pcms->max_ram_below_4g) {
lowmem = pcms->max_ram_below_4g;
if (machine->ram_size - lowmem > lowmem &&
- lowmem & ((1ULL << 30) - 1)) {
+ lowmem & (1 * GiB - 1)) {
warn_report("There is possibly poor performance as the ram size "
" (0x%" PRIx64 ") is more then twice the size of"
" max-ram-below-4g (%"PRIu64") and"
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 73ac783..091e22d 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -28,6 +28,7 @@
#include "sysemu/block-backend.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
+#include "qemu/units.h"
#include "hw/sysbus.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
@@ -56,7 +57,7 @@
flash_size = memory_region_size(flash_mem);
/* map the last 128KB of the BIOS in ISA space */
- isa_bios_size = MIN(flash_size, 128 * 1024);
+ isa_bios_size = MIN(flash_size, 128 * KiB);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size,
&error_fatal);
@@ -83,7 +84,7 @@
* only 18MB-4KB below 4G. For now, restrict the cumulative mapping to 8MB in
* size.
*/
-#define FLASH_MAP_BASE_MIN ((hwaddr)(0x100000000ULL - 8*1024*1024))
+#define FLASH_MAP_BASE_MIN ((hwaddr)(4 * GiB - 8 * MiB))
/* This function maps flash drives from 4G downward, in order of their unit
* numbers. The mapping starts at unit#0, with unit number increments of 1, and
@@ -221,10 +222,7 @@
g_free(filename);
/* map the last 128KB of the BIOS in ISA space */
- isa_bios_size = bios_size;
- if (isa_bios_size > (128 * 1024)) {
- isa_bios_size = 128 * 1024;
- }
+ isa_bios_size = MIN(bios_size, 128 * KiB);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_alias(isa_bios, NULL, "isa-bios", bios,
bios_size - isa_bios_size, isa_bios_size);
diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c
index 628b813..4e4f069 100644
--- a/hw/i386/xen/xen-mapcache.c
+++ b/hw/i386/xen/xen-mapcache.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include <sys/resource.h>
@@ -46,7 +47,7 @@
* From empirical tests I observed that qemu use 75MB more than the
* max_mcache_size.
*/
-#define NON_MCACHE_MEMORY_SIZE (80 * 1024 * 1024)
+#define NON_MCACHE_MEMORY_SIZE (80 * MiB)
typedef struct MapCacheEntry {
hwaddr paddr_index;
diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c
index da05c85..cd3e791 100644
--- a/hw/ipack/tpci200.c
+++ b/hw/ipack/tpci200.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/ipack/ipack.h"
#include "hw/pci/pci.h"
#include "qemu/bitops.h"
@@ -597,9 +598,9 @@
memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops,
s, "tpci200_las1", 1024);
memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops,
- s, "tpci200_las2", 1024*1024*32);
+ s, "tpci200_las2", 32 * MiB);
memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops,
- s, "tpci200_las3", 1024*1024*16);
+ s, "tpci200_las3", 16 * MiB);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las0);
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 1670583..fd8eccc 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -87,10 +88,10 @@
/* memory map */
hwaddr flash_base = 0x04000000;
- size_t flash_sector_size = 256 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 256 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr ram_base = 0x08000000;
- size_t ram_size = 64 * 1024 * 1024;
+ size_t ram_size = 64 * MiB;
hwaddr timer0_base = 0x80002000;
hwaddr uart0_base = 0x80006000;
hwaddr timer1_base = 0x8000a000;
@@ -173,10 +174,10 @@
/* memory map */
hwaddr flash_base = 0x04000000;
- size_t flash_sector_size = 256 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 256 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr ram_base = 0x08000000;
- size_t ram_size = 64 * 1024 * 1024;
+ size_t ram_size = 64 * MiB;
hwaddr uart0_base = 0x80000000;
hwaddr timer0_base = 0x80002000;
hwaddr timer1_base = 0x80010000;
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index c36bbc4..321f184 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -33,11 +34,10 @@
#include "milkymist-hw.h"
#include "lm32.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#define BIOS_FILENAME "mmone-bios.bin"
#define BIOS_OFFSET 0x00860000
-#define BIOS_SIZE (512*1024)
+#define BIOS_SIZE (512 * KiB)
#define KERNEL_LOAD_ADDR 0x40000000
typedef struct {
@@ -96,10 +96,10 @@
/* memory map */
hwaddr flash_base = 0x00000000;
- size_t flash_sector_size = 128 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 128 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr sdram_base = 0x40000000;
- size_t sdram_size = 128 * 1024 * 1024;
+ size_t sdram_size = 128 * MiB;
hwaddr initrd_base = sdram_base + 0x1002000;
hwaddr cmdline_base = sdram_base + 0x1000000;
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index ae3dcc9..0f2245d 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -6,6 +6,7 @@
* This code is licensed under the GPL
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -241,7 +242,7 @@
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
- memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_fatal);
+ memory_region_init_ram(sram, NULL, "mcf5208.sram", 16 * KiB, &error_fatal);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
/* Internal peripherals. */
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 6c4a544..c730878 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -44,8 +45,8 @@
#include "hw/stream.h"
-#define LMB_BRAM_SIZE (128 * 1024)
-#define FLASH_SIZE (32 * 1024 * 1024)
+#define LMB_BRAM_SIZE (128 * KiB)
+#define FLASH_SIZE (32 * MiB)
#define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
@@ -109,7 +110,7 @@
pflash_cfi01_register(FLASH_BASEADDR,
NULL, "petalogix_ml605.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
2, 0x89, 0x18, 0x0000, 0x0, 0);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 0da3e62..5cf7b84 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -39,8 +40,8 @@
#include "boot.h"
-#define LMB_BRAM_SIZE (128 * 1024)
-#define FLASH_SIZE (16 * 1024 * 1024)
+#define LMB_BRAM_SIZE (128 * KiB)
+#define FLASH_SIZE (16 * MiB)
#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
@@ -87,7 +88,7 @@
pflash_cfi01_register(FLASH_BASEADDR,
NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
dev = qdev_create(NULL, "xlnx.xps-intc");
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 14e6f95..6c9c20a 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "exec/address-spaces.h"
@@ -32,7 +33,6 @@
#include "hw/mips/cpudevs.h"
#include "hw/pci-host/xilinx-pcie.h"
#include "qapi/error.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "chardev/char.h"
@@ -200,7 +200,7 @@
val |= PLAT_BUILD_CFG_PCIE2_EN;
return val;
case PLAT_DDR_CFG:
- val = s->mach->ram_size / G_BYTE;
+ val = s->mach->ram_size / GiB;
assert(!(val & ~PLAT_DDR_CFG_SIZE));
val |= PLAT_DDR_CFG_MHZ;
return val;
@@ -355,7 +355,7 @@
return NULL;
}
- ram_low_sz = MIN(256 * M_BYTE, machine->ram_size);
+ ram_low_sz = MIN(256 * MiB, machine->ram_size);
ram_high_sz = machine->ram_size - ram_low_sz;
qemu_fdt_setprop_sized_cells(fdt, "/memory@0", "reg",
1, 0x00000000, 1, ram_low_sz,
@@ -436,8 +436,8 @@
int fw_size, fit_err;
bool is_64b;
- if ((machine->ram_size % G_BYTE) ||
- (machine->ram_size > (2 * G_BYTE))) {
+ if ((machine->ram_size % GiB) ||
+ (machine->ram_size > (2 * GiB))) {
error_report("Memory size must be 1GB or 2GB");
exit(1);
}
@@ -471,7 +471,7 @@
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
flash = g_new(MemoryRegion, 1);
- memory_region_init_rom(flash, NULL, "boston.flash", 128 * M_BYTE, &err);
+ memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err);
memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0);
ddr = g_new(MemoryRegion, 1);
@@ -481,22 +481,22 @@
ddr_low_alias = g_new(MemoryRegion, 1);
memory_region_init_alias(ddr_low_alias, NULL, "boston_low.ddr",
- ddr, 0, MIN(machine->ram_size, (256 * M_BYTE)));
+ ddr, 0, MIN(machine->ram_size, (256 * MiB)));
memory_region_add_subregion_overlap(sys_mem, 0, ddr_low_alias, 0);
xilinx_pcie_init(sys_mem, 0,
- 0x10000000, 32 * M_BYTE,
- 0x40000000, 1 * G_BYTE,
+ 0x10000000, 32 * MiB,
+ 0x40000000, 1 * GiB,
get_cps_irq(s->cps, 2), false);
xilinx_pcie_init(sys_mem, 1,
- 0x12000000, 32 * M_BYTE,
- 0x20000000, 512 * M_BYTE,
+ 0x12000000, 32 * MiB,
+ 0x20000000, 512 * MiB,
get_cps_irq(s->cps, 1), false);
pcie2 = xilinx_pcie_init(sys_mem, 2,
- 0x14000000, 32 * M_BYTE,
- 0x16000000, 1 * M_BYTE,
+ 0x14000000, 32 * MiB,
+ 0x16000000, 1 * MiB,
get_cps_irq(s->cps, 0), true);
platreg = g_new(MemoryRegion, 1);
@@ -526,7 +526,7 @@
if (machine->firmware) {
fw_size = load_image_targphys(machine->firmware,
- 0x1fc00000, 4 * M_BYTE);
+ 0x1fc00000, 4 * MiB);
if (fw_size == -1) {
error_printf("unable to load firmware image '%s'\n",
machine->firmware);
@@ -552,7 +552,7 @@
mc->desc = "MIPS Boston";
mc->init = boston_mach_init;
mc->block_default_type = IF_IDE;
- mc->default_ram_size = 1 * G_BYTE;
+ mc->default_ram_size = 1 * GiB;
mc->max_cpus = 16;
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
}
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 02fb2fd..c1694c8 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
@@ -159,7 +160,7 @@
/* Setup minimum environment variables */
prom_set(prom_buf, index++, "busclock=33000000");
prom_set(prom_buf, index++, "cpuclock=100000000");
- prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
+ prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
prom_set(prom_buf, index++, "modetty0=38400n8r");
prom_set(prom_buf, index++, NULL);
@@ -303,10 +304,10 @@
qemu_register_reset(main_cpu_reset, cpu);
/* fulong 2e has 256M ram. */
- ram_size = 256 * 1024 * 1024;
+ ram_size = 256 * MiB;
/* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
- bios_size = 1024 * 1024;
+ bios_size = 1 * MiB;
/* allocate RAM */
memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 1b4e32e..3467451 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -191,7 +192,7 @@
int i;
/* work in terms of MB */
- ram_size >>= 20;
+ ram_size /= MiB;
while ((ram_size >= 4) && (nbanks <= 2)) {
int sz_log2 = MIN(31 - clz32(ram_size), 14);
@@ -843,7 +844,8 @@
/* The kernel allocates the bootmap memory in the low memory after
the initrd. It takes at most 128kiB for 2GB RAM and 4kiB
pages. */
- initrd_offset = (loaderparams.ram_low_size - initrd_size - 131072
+ initrd_offset = (loaderparams.ram_low_size - initrd_size
+ - (128 * KiB)
- ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
if (kernel_high >= initrd_offset) {
error_report("memory too small for initial ram disk '%s'",
@@ -1021,9 +1023,9 @@
mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
/* allocate RAM */
- if (ram_size > (2048u << 20)) {
- error_report("Too much memory for this machine: %dMB, maximum 2048MB",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 2 * GiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 2048MB", ram_size / MiB);
exit(1);
}
@@ -1034,17 +1036,18 @@
/* alias for pre IO hole access */
memory_region_init_alias(ram_low_preio, NULL, "mips_malta_low_preio.ram",
- ram_high, 0, MIN(ram_size, (256 << 20)));
+ ram_high, 0, MIN(ram_size, 256 * MiB));
memory_region_add_subregion(system_memory, 0, ram_low_preio);
/* alias for post IO hole access, if there is enough RAM */
- if (ram_size > (512 << 20)) {
+ if (ram_size > 512 * MiB) {
ram_low_postio = g_new(MemoryRegion, 1);
memory_region_init_alias(ram_low_postio, NULL,
"mips_malta_low_postio.ram",
- ram_high, 512 << 20,
- ram_size - (512 << 20));
- memory_region_add_subregion(system_memory, 512 << 20, ram_low_postio);
+ ram_high, 512 * MiB,
+ ram_size - 512 * MiB);
+ memory_region_add_subregion(system_memory, 512 * MiB,
+ ram_low_postio);
}
#ifdef TARGET_WORDS_BIGENDIAN
@@ -1076,7 +1079,7 @@
bios = pflash_cfi01_get_memory(fl);
fl_idx++;
if (kernel_filename) {
- ram_low_size = MIN(ram_size, 256 << 20);
+ ram_low_size = MIN(ram_size, 256 * MiB);
/* For KVM we reserve 1MB of RAM for running bootloader */
if (kvm_enabled()) {
ram_low_size -= 0x100000;
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index e5cf8ed..d5725d0 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -8,6 +8,7 @@
* the standard PC ISA addresses.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -79,8 +80,9 @@
static int64_t load_kernel(void)
{
+ const size_t params_size = 264;
int64_t entry, kernel_high;
- long kernel_size, initrd_size, params_size;
+ long kernel_size, initrd_size;
ram_addr_t initrd_offset;
uint32_t *params_buf;
int big_endian;
@@ -128,7 +130,6 @@
}
/* Store command line. */
- params_size = 264;
params_buf = g_malloc(params_size);
params_buf[0] = tswap32(ram_size);
@@ -143,7 +144,7 @@
}
rom_add_blob_fixed("params", params_buf, params_size,
- (16 << 20) - 264);
+ 16 * MiB - params_size);
g_free(params_buf);
return entry;
@@ -158,7 +159,7 @@
env->active_tc.PC = s->vector;
}
-static const int sector_len = 32 * 1024;
+static const int sector_len = 32 * KiB;
static
void mips_r4k_init(MachineState *machine)
{
@@ -194,9 +195,9 @@
qemu_register_reset(main_cpu_reset, reset_info);
/* allocate RAM */
- if (ram_size > (256 << 20)) {
- error_report("Too much memory for this machine: %dMB, maximum 256MB",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 256 * MiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 256MB", ram_size / MiB);
exit(1);
}
memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index b4cacd6..b8a8721 100644
--- a/hw/misc/auxbus.c
+++ b/hw/misc/auxbus.c
@@ -27,6 +27,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "hw/misc/auxbus.h"
#include "hw/i2c/i2c.h"
@@ -68,7 +69,7 @@
/* Memory related. */
bus->aux_io = g_malloc(sizeof(*bus->aux_io));
- memory_region_init(bus->aux_io, OBJECT(bus), "aux-io", (1 << 20));
+ memory_region_init(bus->aux_io, OBJECT(bus), "aux-io", 1 * MiB);
address_space_init(&bus->aux_addr_space, bus->aux_io, "aux-io");
return bus;
}
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 34eb05d..df26a4d 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
#include "qemu/timer.h"
@@ -357,7 +358,7 @@
edu, QEMU_THREAD_JOINABLE);
memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu,
- "edu-mmio", 1 << 20);
+ "edu-mmio", 1 * MiB);
pci_register_bar(pdev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &edu->mmio);
}
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index ee01c5e..6febbab 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -17,6 +17,7 @@
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/cutils.h"
#include "hw/hw.h"
@@ -1301,7 +1302,7 @@
}
if (s->sizearg == NULL) {
- s->legacy_size = 4 << 20; /* 4 MB default */
+ s->legacy_size = 4 * MiB; /* 4 MB default */
} else {
int ret;
uint64_t size;
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index ccc4c7d..43bbec4 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "qapi/error.h"
#include "cpu.h"
@@ -80,7 +81,7 @@
uint64_t *am = &tag->ITCAddressMap[0];
MemoryRegion *mr = &tag->storage_io;
hwaddr address = am[0] & ITC_AM0_BASE_ADDRESS_MASK;
- uint64_t size = (1 << 10) + (am[1] & ITC_AM1_ADDR_MASK_MASK);
+ uint64_t size = (1 * KiB) + (am[1] & ITC_AM1_ADDR_MASK_MASK);
bool is_enabled = (am[0] & ITC_AM0_EN_MASK) != 0;
memory_region_transaction_begin();
diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c
index cda8d48..510ddb3 100644
--- a/hw/net/e1000e.c
+++ b/hw/net/e1000e.c
@@ -34,6 +34,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "net/net.h"
#include "net/tap.h"
#include "qemu/range.h"
@@ -81,10 +82,10 @@
#define E1000E_IO_IDX 2
#define E1000E_MSIX_IDX 3
-#define E1000E_MMIO_SIZE (128 * 1024)
-#define E1000E_FLASH_SIZE (128 * 1024)
+#define E1000E_MMIO_SIZE (128 * KiB)
+#define E1000E_FLASH_SIZE (128 * KiB)
#define E1000E_IO_SIZE (32)
-#define E1000E_MSIX_SIZE (16 * 1024)
+#define E1000E_MSIX_SIZE (16 * KiB)
#define E1000E_MSIX_TABLE (0x0000)
#define E1000E_MSIX_PBA (0x2000)
diff --git a/hw/net/e1000x_common.c b/hw/net/e1000x_common.c
index eb0e097..0904780 100644
--- a/hw/net/e1000x_common.c
+++ b/hw/net/e1000x_common.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "net/net.h"
@@ -111,7 +112,7 @@
static const int maximum_ethernet_vlan_size = 1522;
/* this is the size past which hardware will
drop packets when setting LPE=1 */
- static const int maximum_ethernet_lpe_size = 16384;
+ static const int maximum_ethernet_lpe_size = 16 * KiB;
if ((size > maximum_ethernet_lpe_size ||
(size > maximum_ethernet_vlan_size
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index a07a632..e761daf 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -41,6 +41,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "net/net.h"
@@ -60,8 +61,6 @@
* changed to pad short packets itself. */
#define CONFIG_PAD_RECEIVED_FRAMES
-#define KiB 1024
-
/* Debug EEPRO100 card. */
#if 0
# define DEBUG_EEPRO100
diff --git a/hw/net/ne2000.h b/hw/net/ne2000.h
index adb8021..2cd193e 100644
--- a/hw/net/ne2000.h
+++ b/hw/net/ne2000.h
@@ -1,11 +1,12 @@
#ifndef HW_NE2000_H
#define HW_NE2000_H
+#include "qemu/units.h"
#include "hw/hw.h"
#include "net/net.h"
-#define NE2000_PMEM_SIZE (32*1024)
-#define NE2000_PMEM_START (16*1024)
+#define NE2000_PMEM_SIZE (32 * KiB)
+#define NE2000_PMEM_START (16 * KiB)
#define NE2000_PMEM_END (NE2000_PMEM_SIZE+NE2000_PMEM_START)
#define NE2000_MEM_SIZE NE2000_PMEM_END
diff --git a/hw/nios2/boot.c b/hw/nios2/boot.c
index 94f436e..4bb5b60 100644
--- a/hw/nios2/boot.c
+++ b/hw/nios2/boot.c
@@ -29,6 +29,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "qemu/option.h"
@@ -38,7 +39,6 @@
#include "sysemu/sysemu.h"
#include "hw/loader.h"
#include "elf.h"
-#include "qemu/cutils.h"
#include "boot.h"
@@ -177,7 +177,7 @@
high = ddr_base + kernel_size;
}
- high = ROUND_UP(high, 1024 * 1024);
+ high = ROUND_UP(high, 1 * MiB);
/* If initrd is available, it goes after the kernel, aligned to 1M. */
if (initrd_filename) {
@@ -213,7 +213,7 @@
high += fdt_size;
/* Kernel command is at the end, 4k aligned. */
- boot_info.cmdline = ROUND_UP(high, 4096);
+ boot_info.cmdline = ROUND_UP(high, 4 * KiB);
if (kernel_cmdline && strlen(kernel_cmdline)) {
pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline);
}
diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c
index 4a0aec8..bed1557 100644
--- a/hw/nvram/spapr_nvram.c
+++ b/hw/nvram/spapr_nvram.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -47,9 +48,9 @@
#define VIO_SPAPR_NVRAM(obj) \
OBJECT_CHECK(sPAPRNVRAM, (obj), TYPE_VIO_SPAPR_NVRAM)
-#define MIN_NVRAM_SIZE 8192
-#define DEFAULT_NVRAM_SIZE 65536
-#define MAX_NVRAM_SIZE 1048576
+#define MIN_NVRAM_SIZE (8 * KiB)
+#define DEFAULT_NVRAM_SIZE (64 * KiB)
+#define MAX_NVRAM_SIZE (1 * MiB)
static void rtas_nvram_fetch(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token, uint32_t nargs,
@@ -167,7 +168,9 @@
nvram->buf = g_malloc0(nvram->size);
if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
- error_setg(errp, "spapr-nvram must be between %d and %d bytes in size",
+ error_setg(errp,
+ "spapr-nvram must be between %" PRId64
+ " and %" PRId64 " bytes in size",
MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
return;
}
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 01f67f9..88f035c 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
@@ -70,7 +71,7 @@
int contiguous_map;
} PREPPCIState;
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
static inline uint32_t raven_pci_io_config(hwaddr addr)
{
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index b0a31b9..60309af 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci-host/xilinx-pcie.h"
@@ -157,9 +158,9 @@
static Property xilinx_pcie_host_props[] = {
DEFINE_PROP_UINT32("bus_nr", XilinxPCIEHost, bus_nr, 0),
DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
- DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 << 20),
+ DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
- DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 << 20),
+ DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
DEFINE_PROP_BOOL("link_up", XilinxPCIEHost, link_up, true),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 826053e..7d19b14 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -15,6 +15,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "e500.h"
#include "e500-ccsr.h"
@@ -46,11 +47,11 @@
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define DTC_LOAD_PAD 0x1800000
#define DTC_PAD_MASK 0xFFFFF
-#define DTB_MAX_SIZE (8 * 1024 * 1024)
+#define DTB_MAX_SIZE (8 * MiB)
#define INITRD_LOAD_PAD 0x2000000
#define INITRD_PAD_MASK 0xFFFFFF
-#define RAM_SIZES_ALIGN (64UL << 20)
+#define RAM_SIZES_ALIGN (64 * MiB)
/* TODO: parameterize */
#define MPC8544_CCSRBAR_SIZE 0x00100000ULL
@@ -603,7 +604,7 @@
/* Create -kernel TLB entries for BookE. */
hwaddr booke206_page_size_to_tlb(uint64_t size)
{
- return 63 - clz64(size >> 10);
+ return 63 - clz64(size / KiB);
}
static int booke206_initial_map_tsize(CPUPPCState *env)
@@ -671,7 +672,7 @@
/* Set initial guest state. */
cs->halted = 0;
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = bi->dt_base;
env->gpr[4] = 0;
env->gpr[5] = 0;
@@ -1012,9 +1013,9 @@
}
cur_base = loadaddr + payload_size;
- if (cur_base < (32 * 1024 * 1024)) {
+ if (cur_base < 32 * MiB) {
/* u-boot occupies memory up to 32MB, so load blobs above */
- cur_base = (32 * 1024 * 1024);
+ cur_base = 32 * MiB;
}
/* Load bare kernel only if no bios/u-boot has been provided */
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index d8e3f20..963d429 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "e500.h"
#include "hw/net/fsl_etsec/etsec.h"
@@ -85,7 +86,7 @@
pmc->has_mpc8xxx_gpio = true;
pmc->has_platform_bus = true;
pmc->platform_bus_base = 0xf00000000ULL;
- pmc->platform_bus_size = (128ULL * 1024 * 1024);
+ pmc->platform_bus_size = 128 * MiB;
pmc->platform_bus_first_irq = 5;
pmc->platform_bus_num_irqs = 10;
pmc->ccsrbar_base = 0xFE0000000ULL;
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index c0217e6..41fd289 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -26,6 +26,7 @@
#ifndef PPC_MAC_H
#define PPC_MAC_H
+#include "qemu/units.h"
#include "exec/memory.h"
#include "hw/boards.h"
#include "hw/sysbus.h"
@@ -38,7 +39,7 @@
/* SMP is not enabled, for now */
#define MAX_CPUS 1
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
#define NVRAM_SIZE 0x2000
#define PROM_FILENAME "openbios-ppc"
#define PROM_ADDR 0xfff00000
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 2b13fcd..d119801 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -71,7 +71,6 @@
#include "hw/usb.h"
#include "exec/address-spaces.h"
#include "hw/sysbus.h"
-#include "qemu/cutils.h"
#include "trace.h"
#define MAX_IDE_BUS 2
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 4608bab..06ed6f6 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -24,6 +24,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
@@ -46,7 +47,6 @@
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#define MAX_IDE_BUS 2
#define CFG_ADDR 0xf0000510
@@ -118,10 +118,9 @@
}
/* allocate RAM */
- if (ram_size > (2047 << 20)) {
- fprintf(stderr,
- "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 2047 * MiB) {
+ error_report("Too much memory for this machine: %" PRId64 " MB, "
+ "maximum 2047 MB", ram_size / MiB);
exit(1);
}
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7401ffe..346f5e7 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
@@ -31,7 +32,6 @@
#include "hw/ppc/pnv_core.h"
#include "hw/loader.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#include "qapi/visitor.h"
#include "monitor/monitor.h"
#include "hw/intc/intc.h"
@@ -556,7 +556,7 @@
char *chip_typename;
/* allocate RAM */
- if (machine->ram_size < (1 * G_BYTE)) {
+ if (machine->ram_size < (1 * GiB)) {
warn_report("skiboot may not work with < 1GB of RAM");
}
@@ -1174,7 +1174,7 @@
* storage */
mc->no_parallel = 1;
mc->default_boot_order = NULL;
- mc->default_ram_size = 1 * G_BYTE;
+ mc->default_ram_size = 1 * GiB;
xic->icp_get = pnv_icp_get;
xic->ics_get = pnv_ics_get;
xic->ics_resend = pnv_ics_resend;
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index d301067..7011107 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -40,7 +41,7 @@
#include "exec/address-spaces.h"
#define BIOS_FILENAME "ppc405_rom.bin"
-#define BIOS_SIZE (2048 * 1024)
+#define BIOS_SIZE (2 * MiB)
#define KERNEL_LOAD_ADDR 0x00000000
#define INITRD_LOAD_ADDR 0x01800000
@@ -216,14 +217,14 @@
memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
ram_bases[1] = 0x00000000;
ram_sizes[1] = 0x00000000;
- ram_size = 128 * 1024 * 1024;
+ ram_size = 128 * MiB;
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
- sram_size = 512 * 1024;
+ sram_size = 512 * KiB;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size,
&error_fatal);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
@@ -589,7 +590,7 @@
bios_size = blk_getlength(blk);
/* XXX: should check that size is 32MB */
- bios_size = 32 * 1024 * 1024;
+ bios_size = 32 * MiB;
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 34f8d57..4bd9fbc 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -983,10 +984,10 @@
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
- memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096,
+ memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4 * KiB,
&error_fatal);
- memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
- 0, 4096);
+ memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc",
+ &ocm->isarc_ram, 0, 4 * KiB);
qemu_register_reset(&ocm_reset, ocm);
ppc_dcr_register(env, OCM0_ISARC,
ocm, &dcr_read_ocm, &dcr_write_ocm);
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 44e6a0c..3d4c43b 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -12,6 +12,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "qemu/error-report.h"
@@ -49,7 +50,7 @@
#define PPC440EP_SDRAM_NR_BANKS 4
static const unsigned int ppc440ep_sdram_bank_sizes[] = {
- 256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
+ 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 16 * MiB, 8 * MiB, 0
};
static hwaddr entry;
@@ -151,7 +152,7 @@
CPUPPCState *env = &cpu->env;
cpu_reset(CPU(cpu));
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = entry;
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 32802d7..0bbaa68 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -9,8 +9,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu/log.h"
@@ -216,13 +216,13 @@
l2sram = g_malloc0(sizeof(*l2sram));
/* XXX: Size is 4*64kB for 460ex, cf. U-Boot, ppc4xx-isram.h */
memory_region_init_ram(&l2sram->bank[0], NULL, "ppc4xx.l2sram_bank0",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[1], NULL, "ppc4xx.l2sram_bank1",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[2], NULL, "ppc4xx.l2sram_bank2",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[3], NULL, "ppc4xx.l2sram_bank3",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
qemu_register_reset(&l2sram_reset, l2sram);
ppc_dcr_register(env, DCR_L2CACHE_CFG,
l2sram, &dcr_read_l2sram, &dcr_write_l2sram);
@@ -514,28 +514,28 @@
uint32_t bcr;
switch (ram_size) {
- case (8 * M_BYTE):
+ case (8 * MiB):
bcr = 0xffc0;
break;
- case (16 * M_BYTE):
+ case (16 * MiB):
bcr = 0xff80;
break;
- case (32 * M_BYTE):
+ case (32 * MiB):
bcr = 0xff00;
break;
- case (64 * M_BYTE):
+ case (64 * MiB):
bcr = 0xfe00;
break;
- case (128 * M_BYTE):
+ case (128 * MiB):
bcr = 0xfc00;
break;
- case (256 * M_BYTE):
+ case (256 * MiB):
bcr = 0xf800;
break;
- case (512 * M_BYTE):
+ case (512 * MiB):
bcr = 0xf000;
break;
- case (1 * G_BYTE):
+ case (1 * GiB):
bcr = 0xe000;
break;
default:
@@ -562,7 +562,7 @@
if (sh == 0) {
size = -1;
} else {
- size = 8 * M_BYTE * sh;
+ size = 8 * MiB * sh;
}
return size;
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 2e96389..8c6f3c9 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
@@ -29,6 +30,7 @@
#include "hw/boards.h"
#include "qemu/log.h"
#include "exec/address-spaces.h"
+#include "qemu/error-report.h"
#define DEBUG_UIC
@@ -353,25 +355,25 @@
uint32_t bcr;
switch (ram_size) {
- case (4 * 1024 * 1024):
+ case 4 * MiB:
bcr = 0x00000000;
break;
- case (8 * 1024 * 1024):
+ case 8 * MiB:
bcr = 0x00020000;
break;
- case (16 * 1024 * 1024):
+ case 16 * MiB:
bcr = 0x00040000;
break;
- case (32 * 1024 * 1024):
+ case 32 * MiB:
bcr = 0x00060000;
break;
- case (64 * 1024 * 1024):
+ case 64 * MiB:
bcr = 0x00080000;
break;
- case (128 * 1024 * 1024):
+ case 128 * MiB:
bcr = 0x000A0000;
break;
- case (256 * 1024 * 1024):
+ case 256 * MiB:
bcr = 0x000C0000;
break;
default:
@@ -399,7 +401,7 @@
if (sh == 7)
size = -1;
else
- size = (4 * 1024 * 1024) << sh;
+ size = (4 * MiB) << sh;
return size;
}
@@ -702,8 +704,8 @@
ram_size -= size_left;
if (size_left) {
- printf("Truncating memory to %d MiB to fit SDRAM controller limits.\n",
- (int)(ram_size >> 20));
+ error_report("Truncating memory to %" PRId64 " MiB to fit SDRAM"
+ " controller limits", ram_size / MiB);
}
memory_region_allocate_system_memory(ram, NULL, "ppc4xx.sdram", ram_size);
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index 69ca2d0..c45fc85 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -28,6 +28,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/hw_accel.h"
@@ -89,7 +90,7 @@
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
SpinInfo *curspin = data.host_ptr;
- hwaddr map_size = 64 * 1024 * 1024;
+ hwaddr map_size = 64 * MiB;
hwaddr map_start;
cpu_synchronize_state(cs);
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 5ed0bcd..6689407 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -50,7 +50,7 @@
#include "exec/address-spaces.h"
#include "trace.h"
#include "elf.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "kvm_ppc.h"
/* SMP is not enabled, for now */
@@ -60,7 +60,7 @@
#define CFG_ADDR 0xf0000510
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
#define BIOS_FILENAME "ppc_rom.bin"
#define KERNEL_LOAD_ADDR 0x01000000
#define INITRD_LOAD_ADDR 0x01800000
@@ -884,7 +884,7 @@
mc->desc = "IBM RS/6000 7020 (40p)",
mc->init = ibm_40p_init;
mc->max_cpus = 1;
- mc->default_ram_size = 128 * M_BYTE;
+ mc->default_ram_size = 128 * MiB;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604");
diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
index b613565..45cb95e 100644
--- a/hw/ppc/rs6000_mc.c
+++ b/hw/ppc/rs6000_mc.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/isa/isa.h"
#include "exec/address-spaces.h"
#include "hw/boards.h"
@@ -109,7 +110,7 @@
size = end_address - start_address;
memory_region_set_enabled(&s->simm[socket - 1], size != 0);
memory_region_set_address(&s->simm[socket - 1],
- start_address * 8 * 1024 * 1024);
+ start_address * 8 * MiB);
}
}
}
@@ -140,7 +141,7 @@
{
RS6000MCState *s = RS6000MC_DEVICE(dev);
int socket = 0;
- unsigned int ram_size = s->ram_size / (1024 * 1024);
+ unsigned int ram_size = s->ram_size / MiB;
while (socket < 6) {
if (ram_size >= 64) {
@@ -163,8 +164,8 @@
char name[] = "simm.?";
name[5] = socket + '0';
memory_region_allocate_system_memory(&s->simm[socket], OBJECT(dev),
- name, s->simm_size[socket]
- * 1024 * 1024);
+ name,
+ s->simm_size[socket] * MiB);
memory_region_add_subregion_overlap(get_system_memory(), 0,
&s->simm[socket], socket);
}
@@ -172,8 +173,8 @@
if (ram_size) {
/* unable to push all requested RAM in SIMMs */
error_setg(errp, "RAM size incompatible with this board. "
- "Try again with something else, like %d MB",
- s->ram_size / 1024 / 1024 - ram_size);
+ "Try again with something else, like %" PRId64 " MB",
+ s->ram_size / MiB - ram_size);
return;
}
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 80c888c..7eed2ec 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -12,8 +12,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "hw/hw.h"
@@ -48,7 +48,7 @@
/* from Sam460 U-Boot include/configs/Sam460ex.h */
#define FLASH_BASE 0xfff00000
#define FLASH_BASE_H 0x4
-#define FLASH_SIZE (1 << 20)
+#define FLASH_SIZE (1 * MiB)
#define UBOOT_LOAD_BASE 0xfff80000
#define UBOOT_SIZE 0x00080000
#define UBOOT_ENTRY 0xfffffffc
@@ -77,7 +77,7 @@
/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
static const unsigned int ppc460ex_sdram_bank_sizes[] = {
- 1024 << 20, 512 << 20, 256 << 20, 128 << 20, 64 << 20, 32 << 20, 0
+ 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 0
};
struct boot_info {
@@ -132,7 +132,7 @@
int i;
/* work in terms of MB */
- ram_size >>= 20;
+ ram_size /= MiB;
while ((ram_size >= 4) && (nbanks <= 2)) {
int sz_log2 = MIN(31 - clz32(ram_size), 14);
@@ -231,7 +231,7 @@
fl_sectors = (bios_size + 65535) >> 16;
if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
- blk, (64 * 1024), fl_sectors,
+ blk, 64 * KiB, fl_sectors,
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
error_report("qemu: Error registering flash memory.");
/* XXX: return an error instead? */
@@ -387,14 +387,14 @@
/* either we have a kernel to boot or we jump to U-Boot */
if (bi->entry != UBOOT_ENTRY) {
- env->gpr[1] = (16 << 20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = bi->entry;
/* Create a mapping for the kernel. */
mmubooke_create_initial_mapping(env, 0, 0);
env->gpr[6] = tswap32(EPAPR_MAGIC);
- env->gpr[7] = (16 << 20) - 8; /*bi->ima_size;*/
+ env->gpr[7] = (16 * MiB) - 8; /* bi->ima_size; */
} else {
env->nip = UBOOT_ENTRY;
@@ -511,7 +511,7 @@
/* 256K of L2 cache as memory */
ppc4xx_l2sram_init(env);
/* FIXME: remove this after fixing l2sram mapping in ppc440_uc.c? */
- memory_region_init_ram(l2cache_ram, NULL, "ppc440.l2cache_ram", 256 << 10,
+ memory_region_init_ram(l2cache_ram, NULL, "ppc440.l2cache_ram", 256 * KiB,
&error_abort);
memory_region_add_subregion(address_space_mem, 0x400000000LL, l2cache_ram);
@@ -629,7 +629,7 @@
mc->desc = "aCube Sam460ex";
mc->init = sam460ex_init;
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("460exb");
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
}
DEFINE_MACHINE("sam460ex", sam460ex_machine_init)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 6e8723d..3f5e1d3 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2322,17 +2322,17 @@
if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
machine->ram_size,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
machine->ram_size,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
@@ -2340,9 +2340,9 @@
if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp,
"Node %d memory size 0x%" PRIx64
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
i, numa_info[i].node_mem,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
}
@@ -2763,7 +2763,7 @@
}
}
- if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
+ if (spapr->rma_size < (MIN_RMA_SLOF * MiB)) {
error_report(
"pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
MIN_RMA_SLOF);
@@ -3209,7 +3209,7 @@
if (size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Hotplugged memory size must be a multiple of "
- "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ "%" PRIu64 " MB", SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
@@ -3961,7 +3961,7 @@
mc->max_cpus = 1024;
mc->no_parallel = 1;
mc->default_boot_order = "";
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
mc->default_display = "std";
mc->kvm_type = spapr_kvm_type;
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE);
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 7f9738d..4ac96bc 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -237,11 +237,11 @@
switch (parameter) {
case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
char *param_val = g_strdup_printf("MaxEntCap=%d,"
- "DesMem=%llu,"
+ "DesMem=%" PRIu64 ","
"DesProcs=%d,"
"MaxPlatProcs=%d",
max_cpus,
- current_machine->ram_size / M_BYTE,
+ current_machine->ram_size / MiB,
smp_cpus,
max_cpus);
ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index b4bb90d..7891464 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/hw.h"
@@ -45,7 +46,7 @@
#include "ppc405.h"
#define EPAPR_MAGIC (0x45504150)
-#define FLASH_SIZE (16 * 1024 * 1024)
+#define FLASH_SIZE (16 * MiB)
#define INTC_BASEADDR 0x81800000
#define UART16550_BASEADDR 0x83e01003
@@ -127,7 +128,7 @@
* r8: 0
* r9: 0
*/
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
/* Provide a device-tree. */
env->gpr[3] = bi->fdt;
env->nip = bi->bootstrap_pc;
@@ -235,7 +236,7 @@
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h
index 0b46dc5..81e0e0e 100644
--- a/hw/rdma/vmw/pvrdma.h
+++ b/hw/rdma/vmw/pvrdma.h
@@ -16,6 +16,7 @@
#ifndef PVRDMA_PVRDMA_H
#define PVRDMA_PVRDMA_H
+#include "qemu/units.h"
#include "hw/pci/pci.h"
#include "hw/pci/msix.h"
@@ -30,7 +31,7 @@
#define RDMA_MSIX_BAR_IDX 0
#define RDMA_REG_BAR_IDX 1
#define RDMA_UAR_BAR_IDX 2
-#define RDMA_BAR0_MSIX_SIZE (16 * 1024)
+#define RDMA_BAR0_MSIX_SIZE (16 * KiB)
#define RDMA_BAR1_REGS_SIZE 64
#define RDMA_BAR2_UAR_SIZE (0x1000 * MAX_UCS) /* each uc gets page */
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ad03113..34d4899 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
@@ -84,7 +85,7 @@
* halfway into RAM, and for boards with 256MB of RAM or more we put
* the initrd at 128MB.
*/
- *start = kernel_entry + MIN(mem_size / 2, 128 * 1024 * 1024);
+ *start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
size = load_ramdisk(filename, *start, mem_size - *start);
if (size == -1) {
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 76241c2..15f7ab0 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "hw/s390x/storage-keys.h"
#include "qapi/error.h"
@@ -19,7 +20,7 @@
#include "sysemu/kvm.h"
#include "migration/register.h"
-#define S390_SKEYS_BUFFER_SIZE 131072 /* Room for 128k storage keys */
+#define S390_SKEYS_BUFFER_SIZE (128 * KiB) /* Room for 128k storage keys */
#define S390_SKEYS_SAVE_FLAG_EOS 0x01
#define S390_SKEYS_SAVE_FLAG_SKEYS 0x02
#define S390_SKEYS_SAVE_FLAG_ERROR 0x04
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index 70b9555..5161a16 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "cpu.h"
#include "migration/qemu-file.h"
@@ -20,7 +21,7 @@
#include "qapi/error.h"
#include "qapi/qmp/qdict.h"
-#define CMMA_BLOCK_SIZE (1 << 10)
+#define CMMA_BLOCK_SIZE (1 * KiB)
#define STATTR_FLAG_EOS 0x01ULL
#define STATTR_FLAG_MORE 0x02ULL
diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
index 047d577..bd2a024 100644
--- a/hw/s390x/sclp.c
+++ b/hw/s390x/sclp.c
@@ -13,6 +13,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "sysemu/sysemu.h"
@@ -289,7 +290,7 @@
ret = s390_set_memory_limit(machine->maxram_size, &hw_limit);
if (ret == -E2BIG) {
error_setg(&err, "host supports a maximum of %" PRIu64 " GB",
- hw_limit >> 30);
+ hw_limit / GiB);
} else if (ret) {
error_setg(&err, "setting the guest size failed");
}
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 55a34b3..32f3f96 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -29,6 +29,7 @@
#endif
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/scsi/scsi.h"
@@ -44,13 +45,13 @@
#include <scsi/sg.h>
#endif
-#define SCSI_WRITE_SAME_MAX 524288
-#define SCSI_DMA_BUF_SIZE 131072
+#define SCSI_WRITE_SAME_MAX (512 * KiB)
+#define SCSI_DMA_BUF_SIZE (128 * KiB)
#define SCSI_MAX_INQUIRY_LEN 256
#define SCSI_MAX_MODE_LEN 256
-#define DEFAULT_DISCARD_GRANULARITY 4096
-#define DEFAULT_MAX_UNMAP_SIZE (1 << 30) /* 1 GB */
+#define DEFAULT_DISCARD_GRANULARITY (4 * KiB)
+#define DEFAULT_MAX_UNMAP_SIZE (1 * GiB)
#define DEFAULT_MAX_IO_SIZE INT_MAX /* 2 GB - 1 block */
#define TYPE_SCSI_DISK_BASE "scsi-disk-base"
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 540bccb..d4356e9 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -31,6 +31,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/qdev.h"
#include "hw/hw.h"
#include "hw/registerfields.h"
@@ -38,7 +39,6 @@
#include "hw/sd/sd.h"
#include "qapi/error.h"
#include "qemu/bitmap.h"
-#include "qemu/cutils.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
@@ -305,7 +305,7 @@
/* card power-up OK */
sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
- if (sd->size > 1 * G_BYTE) {
+ if (sd->size > 1 * GiB) {
sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
}
}
@@ -377,7 +377,7 @@
uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
- if (size <= 1 * G_BYTE) { /* Standard Capacity SD */
+ if (size <= 1 * GiB) { /* Standard Capacity SD */
sd->csd[0] = 0x00; /* CSD structure */
sd->csd[1] = 0x26; /* Data read access-time-1 */
sd->csd[2] = 0x00; /* Data read access-time-2 */
@@ -403,7 +403,7 @@
((HWBLOCK_SHIFT << 6) & 0xc0);
sd->csd[14] = 0x00; /* File format group */
} else { /* SDHC */
- size /= 512 * 1024;
+ size /= 512 * KiB;
size -= 1;
sd->csd[0] = 0x40;
sd->csd[1] = 0x0e;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 321d02d..8f58c31 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "hw/hw.h"
@@ -32,7 +33,6 @@
#include "hw/sd/sdhci.h"
#include "sdhci-internal.h"
#include "qemu/log.h"
-#include "qemu/cutils.h"
#include "trace.h"
#define TYPE_SDHCI_BUS "sdhci-bus"
@@ -409,7 +409,7 @@
/*
* Programmed i/o data transfer
*/
-#define BLOCK_SIZE_MASK (4 * K_BYTE - 1)
+#define BLOCK_SIZE_MASK (4 * KiB - 1)
/* Fill host controller's read buffer with BLKSIZE bytes of data from card */
static void sdhci_read_block_from_card(SDHCIState *s)
@@ -737,7 +737,7 @@
if ((dscr->attr & SDHC_ADMA_ATTR_ACT_MASK) == SDHC_ADMA_ATTR_SET_LEN) {
dscr->length = (uint16_t)extract32(adma1, 12, 16);
} else {
- dscr->length = 4096;
+ dscr->length = 4 * KiB;
}
break;
case SDHC_CTRL_ADMA2_64:
@@ -785,7 +785,7 @@
return;
}
- length = dscr.length ? dscr.length : 65536;
+ length = dscr.length ? dscr.length : 64 * KiB;
switch (dscr.attr & SDHC_ADMA_ATTR_ACT_MASK) {
case SDHC_ADMA_ATTR_ACT_TRAN: /* data transfer */
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 8fe8766..6a5fc46 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -291,7 +292,7 @@
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (16 * 1024), FLASH_SIZE >> 16,
+ 16 * KiB, FLASH_SIZE >> 16,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa, 0);
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 27a07e9..a27e54b 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -16,6 +16,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
@@ -625,10 +626,6 @@
SMBIOS_BUILD_TABLE_POST;
}
-#define ONE_KB ((ram_addr_t)1 << 10)
-#define ONE_MB ((ram_addr_t)1 << 20)
-#define ONE_GB ((ram_addr_t)1 << 30)
-
#define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */
static void smbios_build_type_16_table(unsigned dimm_cnt)
@@ -640,7 +637,7 @@
t->location = 0x01; /* Other */
t->use = 0x03; /* System memory */
t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */
- size_kb = QEMU_ALIGN_UP(ram_size, ONE_KB) / ONE_KB;
+ size_kb = QEMU_ALIGN_UP(ram_size, KiB) / KiB;
if (size_kb < MAX_T16_STD_SZ) {
t->maximum_capacity = cpu_to_le32(size_kb);
t->extended_maximum_capacity = cpu_to_le64(0);
@@ -668,7 +665,7 @@
t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
t->total_width = cpu_to_le16(0xFFFF); /* Unknown */
t->data_width = cpu_to_le16(0xFFFF); /* Unknown */
- size_mb = QEMU_ALIGN_UP(size, ONE_MB) / ONE_MB;
+ size_mb = QEMU_ALIGN_UP(size, MiB) / MiB;
if (size_mb < MAX_T17_STD_SZ) {
t->size = cpu_to_le16(size_mb);
t->extended_size = cpu_to_le32(0);
@@ -707,8 +704,8 @@
end = start + size - 1;
assert(end > start);
- start_kb = start / ONE_KB;
- end_kb = end / ONE_KB;
+ start_kb = start / KiB;
+ end_kb = end / KiB;
if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) {
t->starting_address = cpu_to_le32(start_kb);
t->ending_address = cpu_to_le32(end_kb);
@@ -869,7 +866,7 @@
smbios_build_type_11_table();
-#define MAX_DIMM_SZ (16ll * ONE_GB)
+#define MAX_DIMM_SZ (16 * GiB)
#define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \
: ((ram_size - 1) % MAX_DIMM_SZ) + 1)
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index 98fa6ad..fa98ab8 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -139,9 +140,10 @@
env->qemu_irq_ack = leon3_irq_manager;
/* Allocate RAM */
- if ((uint64_t)ram_size > (1UL << 30)) {
- error_report("Too much memory for this machine: %d, maximum 1G",
- (unsigned int)(ram_size / (1024 * 1024)));
+ if (ram_size > 1 * GiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 1G",
+ ram_size / MiB);
exit(1);
}
@@ -149,7 +151,7 @@
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
- prom_size = 8 * 1024 * 1024; /* 8Mb */
+ prom_size = 8 * MiB;
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 21078cc..d981de1 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -45,7 +46,6 @@
#include "hw/loader.h"
#include "elf.h"
#include "trace.h"
-#include "qemu/cutils.h"
/*
* Sun4m architecture was used in the following machines:
@@ -66,7 +66,7 @@
#define KERNEL_LOAD_ADDR 0x00004000
#define CMDLINE_ADDR 0x007ff000
#define INITRD_LOAD_ADDR 0x00800000
-#define PROM_SIZE_MAX (1024 * 1024)
+#define PROM_SIZE_MAX (1 * MiB)
#define PROM_VADDR 0xffd00000
#define PROM_FILENAME "openbios-sparc32"
#define CFG_ADDR 0xd00000510ULL
@@ -774,9 +774,9 @@
/* allocate RAM */
if ((uint64_t)RAM_size > max_mem) {
- error_report("Too much memory for this machine: %d, maximum %d",
- (unsigned int)(RAM_size / (1024 * 1024)),
- (unsigned int)(max_mem / (1024 * 1024)));
+ error_report("Too much memory for this machine: %" PRId64 ","
+ " maximum %" PRId64,
+ RAM_size / MiB, max_mem / MiB);
exit(1);
}
dev = qdev_create(NULL, "memory");
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
index 22c4655..4fa8cb2 100644
--- a/hw/sparc64/niagara.c
+++ b/hw/sparc64/niagara.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -84,7 +85,7 @@
#define NIAGARA_PROM_BASE 0xfff0000000ULL
#define NIAGARA_Q_OFFSET 0x10000ULL
#define NIAGARA_OBP_OFFSET 0x80000ULL
-#define PROM_SIZE_MAX (4 * 1024 * 1024)
+#define PROM_SIZE_MAX (4 * MiB)
static void add_rom_or_fail(const char *file, const hwaddr addr)
{
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 334dd70..74b7484 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -52,11 +53,10 @@
#include "hw/loader.h"
#include "elf.h"
#include "trace.h"
-#include "qemu/cutils.h"
#define KERNEL_LOAD_ADDR 0x00404000
#define CMDLINE_ADDR 0x003ff000
-#define PROM_SIZE_MAX (4 * 1024 * 1024)
+#define PROM_SIZE_MAX (4 * MiB)
#define PROM_VADDR 0x000ffd00000ULL
#define PBM_SPECIAL_BASE 0x1fe00000000ULL
#define PBM_MEM_BASE 0x1ff00000000ULL
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 8e61dfc..a58096f 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -72,17 +73,17 @@
cpu = TRICORE_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram",
- 2 * 1024 * 1024, &error_fatal);
+ 2 * MiB, &error_fatal);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram",
- 4 * 1024 * 1024, &error_fatal);
- memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48 * 1024,
+ 4 * MiB, &error_fatal);
+ memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48 * KiB,
&error_fatal);
- memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48 * 1024,
+ memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48 * KiB,
&error_fatal);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram",
- 16 * 1024, &error_fatal);
+ 16 * KiB, &error_fatal);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram",
- 32 * 1024, &error_fatal);
+ 32 * KiB, &error_fatal);
memory_region_add_subregion(sysmem, 0x80000000, ext_cram);
memory_region_add_subregion(sysmem, 0xa1000000, ext_dram);
diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c
index 25fb19b..0a6c657 100644
--- a/hw/usb/ccid-card-passthru.c
+++ b/hw/usb/ccid-card-passthru.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <libcacard.h>
#include "chardev/char-fe.h"
#include "qemu/error-report.h"
@@ -40,7 +41,7 @@
0x13, 0x08
};
-#define VSCARD_IN_SIZE 65536
+#define VSCARD_IN_SIZE (64 * KiB)
/* maximum size of ATR - from 7816-3 */
#define MAX_ATR_SIZE 40
@@ -275,9 +276,9 @@
VSCMsgHeader *hdr;
if (card->vscard_in_pos + size > VSCARD_IN_SIZE) {
- error_report(
- "no room for data: pos %d + size %d > %d. dropping connection.",
- card->vscard_in_pos, size, VSCARD_IN_SIZE);
+ error_report("no room for data: pos %u + size %d > %" PRId64 "."
+ " dropping connection.",
+ card->vscard_in_pos, size, VSCARD_IN_SIZE);
ccid_card_vscard_drop_connection(card);
return;
}
diff --git a/hw/usb/combined-packet.c b/hw/usb/combined-packet.c
index 48cac87..01a7ed0 100644
--- a/hw/usb/combined-packet.c
+++ b/hw/usb/combined-packet.c
@@ -20,6 +20,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "hw/usb.h"
#include "qemu/iov.h"
@@ -171,7 +172,7 @@
if ((p->iov.size % ep->max_packet_size) != 0 || !p->short_not_ok ||
next == NULL ||
/* Work around for Linux usbfs bulk splitting + migration */
- (totalsize == 16348 && p->int_req)) {
+ (totalsize == (16 * KiB - 36) && p->int_req)) {
usb_device_handle_data(ep->dev, first);
assert(first->status == USB_RET_ASYNC);
if (first->combined) {
diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c
index 13d0bef..8f716fc 100644
--- a/hw/usb/dev-smartcard-reader.c
+++ b/hw/usb/dev-smartcard-reader.c
@@ -35,6 +35,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "qemu/error-report.h"
@@ -63,7 +64,7 @@
* or handle the migration complexity - VMState doesn't handle this case.
* sizes are expected never to be exceeded, unless guest misbehaves.
*/
-#define BULK_OUT_DATA_SIZE 65536
+#define BULK_OUT_DATA_SIZE (64 * KiB)
#define PENDING_ANSWERS_NUM 128
#define BULK_IN_BUF_SIZE 384
diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c
index 58e8f7f..99094a7 100644
--- a/hw/usb/redirect.c
+++ b/hw/usb/redirect.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "qemu/timer.h"
@@ -1298,7 +1299,7 @@
}
/* usbredir_parser_do_read will consume *all* data we give it */
- return 1024 * 1024;
+ return 1 * MiB;
}
static void usbredir_chardev_read(void *opaque, const uint8_t *buf, int size)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index 061259b..481fd08 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qemu/range.h"
@@ -1448,9 +1449,9 @@
ggms = 1 << ggms;
}
- ggms *= 1024 * 1024;
+ ggms *= MiB;
- return (ggms / (4 * 1024)) * (gen < 8 ? 4 : 8);
+ return (ggms / (4 * KiB)) * (gen < 8 ? 4 : 8);
}
/*
@@ -1705,7 +1706,7 @@
igd->vdev = vdev;
igd->index = ~0;
igd->bdsm = vfio_pci_read_config(&vdev->pdev, IGD_BDSM, 4);
- igd->bdsm &= ~((1 << 20) - 1); /* 1MB aligned */
+ igd->bdsm &= ~((1 * MiB) - 1); /* 1MB aligned */
memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_igd_index_quirk,
igd, "vfio-igd-index-quirk", 4);
@@ -1752,7 +1753,7 @@
* config offset 0x5C.
*/
bdsm_size = g_malloc(sizeof(*bdsm_size));
- *bdsm_size = cpu_to_le64((ggms_mb + gms_mb) * 1024 * 1024);
+ *bdsm_size = cpu_to_le64((ggms_mb + gms_mb) * MiB);
fw_cfg_add_file(fw_cfg_find(), "etc/igd-bdsm-size",
bdsm_size, sizeof(*bdsm_size));
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 18c493b..a1577de 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -28,6 +28,7 @@
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "qemu/range.h"
+#include "qemu/units.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
#include "pci.h"
@@ -1417,7 +1418,7 @@
}
/* 2GB max size for 32-bit BARs, cannot double if already > 1G */
- if (vdev->bars[target_bar].size > (1 * 1024 * 1024 * 1024) &&
+ if (vdev->bars[target_bar].size > 1 * GiB &&
!vdev->bars[target_bar].mem64) {
error_setg(errp, "Invalid MSI-X relocation BAR %d, "
"no space to extend 32-bit BAR", target_bar);
diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c
index 289bbca..855f1b4 100644
--- a/hw/virtio/virtio-rng.c
+++ b/hw/virtio/virtio-rng.c
@@ -156,6 +156,19 @@
vrng->activate_timer = true;
}
+static void virtio_rng_set_status(VirtIODevice *vdev, uint8_t status)
+{
+ VirtIORNG *vrng = VIRTIO_RNG(vdev);
+
+ if (!vdev->vm_running) {
+ return;
+ }
+ vdev->status = status;
+
+ /* Something changed, try to process buffers */
+ virtio_rng_process(vrng);
+}
+
static void virtio_rng_device_realize(DeviceState *dev, Error **errp)
{
VirtIODevice *vdev = VIRTIO_DEVICE(dev);
@@ -261,6 +274,7 @@
vdc->realize = virtio_rng_device_realize;
vdc->unrealize = virtio_rng_device_unrealize;
vdc->get_features = get_features;
+ vdc->set_status = virtio_rng_set_status;
}
static const TypeInfo virtio_rng_info = {
diff --git a/hw/xenpv/xen_domainbuild.c b/hw/xenpv/xen_domainbuild.c
index 027f76f..188acac 100644
--- a/hw/xenpv/xen_domainbuild.c
+++ b/hw/xenpv/xen_domainbuild.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/xen/xen_backend.h"
#include "xen_domainbuild.h"
#include "qemu/timer.h"
@@ -75,9 +76,9 @@
xenstore_write_str(dom, "vm", vm);
/* memory */
- xenstore_write_int(dom, "memory/target", ram_size >> 10); // kB
- xenstore_write_int(vm, "memory", ram_size >> 20); // MB
- xenstore_write_int(vm, "maxmem", ram_size >> 20); // MB
+ xenstore_write_int(dom, "memory/target", ram_size / KiB);
+ xenstore_write_int(vm, "memory", ram_size / MiB);
+ xenstore_write_int(vm, "maxmem", ram_size / MiB);
/* cpus */
for (i = 0; i < smp_cpus; i++) {
@@ -113,7 +114,7 @@
/* console */
xenstore_write_str(dom, "console/type", "ioemu");
- xenstore_write_int(dom, "console/limit", 128 * 1024);
+ xenstore_write_int(dom, "console/limit", 128 * KiB);
xenstore_write_int(dom, "console/ring-ref", console_mfn);
xenstore_write_int(dom, "console/port", console_port);
xen_config_dev_console(0);
@@ -260,7 +261,7 @@
}
#endif
- rc = xc_domain_setmaxmem(xen_xc, xen_domid, ram_size >> 10);
+ rc = xc_domain_setmaxmem(xen_xc, xen_domid, ram_size / KiB);
if (rc < 0) {
fprintf(stderr, "xen: xc_domain_setmaxmem() failed\n");
goto err;
@@ -269,7 +270,7 @@
xenstore_port = xc_evtchn_alloc_unbound(xen_xc, xen_domid, 0);
console_port = xc_evtchn_alloc_unbound(xen_xc, xen_domid, 0);
- rc = xc_linux_build(xen_xc, xen_domid, ram_size >> 20,
+ rc = xc_linux_build(xen_xc, xen_domid, ram_size / MiB,
kernel, ramdisk, cmdline,
0, flags,
xenstore_port, &xenstore_mfn,
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 5dc1303..b3161de 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "sysemu/sysemu.h"
@@ -152,7 +153,7 @@
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16384,
+ memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16 * KiB,
&error_fatal);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
@@ -229,7 +230,7 @@
const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
- const unsigned system_io_size = 224 * 1024 * 1024;
+ const unsigned system_io_size = 224 * MiB;
int n;
for (n = 0; n < smp_cpus; n++) {
@@ -342,7 +343,7 @@
cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
sizeof(dtb_addr), &dtb_addr);
- cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);
+ cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB);
}
#else
if (dtb_filename) {
@@ -370,7 +371,7 @@
initrd_location.end = tswap32(cur_lowmem + initrd_size);
cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
sizeof(initrd_location), &initrd_location);
- cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);
+ cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4 * KiB);
}
cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
env->regs[2] = tagptr;
diff --git a/include/block/block.h b/include/block/block.h
index 2ffc1c6..e5c7759 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -659,13 +659,14 @@
* @dst: Destination child to copy data to
* @dst_offset: offset in @dst image to write data
* @bytes: number of bytes to copy
- * @flags: request flags. Must be one of:
- * 0 - actually read data from src;
+ * @flags: request flags. Supported flags:
* BDRV_REQ_ZERO_WRITE - treat the @src range as zero data and do zero
* write on @dst as if bdrv_co_pwrite_zeroes is
* called. Used to simplify caller code, or
* during BlockDriver.bdrv_co_copy_range_from()
* recursion.
+ * BDRV_REQ_NO_SERIALISING - do not serialize with other overlapping
+ * requests currently in flight.
*
* Returns: 0 if succeeded; negative error code if failed.
**/
diff --git a/include/block/nbd.h b/include/block/nbd.h
index daaeae6..4638c83 100644
--- a/include/block/nbd.h
+++ b/include/block/nbd.h
@@ -259,6 +259,7 @@
struct NBDExportInfo {
/* Set by client before nbd_receive_negotiate() */
bool request_sizes;
+ char *x_dirty_bitmap;
/* In-out fields, set by client before nbd_receive_negotiate() and
* updated by server results during nbd_receive_negotiate() */
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index cb497de..da73e3b 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -412,13 +412,11 @@
}
/* TranslationBlock invalidate API */
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
-void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
-#else
-void tb_invalidate_phys_addr(target_ulong addr);
-#endif
#if defined(CONFIG_USER_ONLY)
+void tb_invalidate_phys_addr(target_ulong addr);
void tb_invalidate_phys_range(target_ulong start, target_ulong end);
+#else
+void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
#endif
void tb_flush(CPUState *cpu);
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h
index 46ac4dc..3580ffd 100644
--- a/include/hw/acpi/tpm.h
+++ b/include/hw/acpi/tpm.h
@@ -16,6 +16,7 @@
#ifndef HW_ACPI_TPM_H
#define HW_ACPI_TPM_H
+#include "qemu/units.h"
#include "hw/registerfields.h"
#define TPM_TIS_ADDR_BASE 0xFED40000
@@ -176,7 +177,7 @@
#define TPM_CRB_ADDR_CTRL (TPM_CRB_ADDR_BASE + A_CRB_CTRL_REQ)
#define TPM_CRB_R_MAX R_CRB_DATA_BUFFER
-#define TPM_LOG_AREA_MINIMUM_SIZE (64 * 1024)
+#define TPM_LOG_AREA_MINIMUM_SIZE (64 * KiB)
#define TPM_TCPA_ACPI_CLASS_CLIENT 0
#define TPM_TCPA_ACPI_CLASS_SERVER 1
diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h
index ee046a5..26b759c 100644
--- a/include/hw/display/xlnx_dp.h
+++ b/include/hw/display/xlnx_dp.h
@@ -29,14 +29,15 @@
#include "hw/display/dpcd.h"
#include "hw/i2c/i2c-ddc.h"
#include "qemu/fifo8.h"
+#include "qemu/units.h"
#include "hw/dma/xlnx_dpdma.h"
#include "audio/audio.h"
#ifndef XLNX_DP_H
#define XLNX_DP_H
-#define AUD_CHBUF_MAX_DEPTH 32768
-#define MAX_QEMU_BUFFER_SIZE 4096
+#define AUD_CHBUF_MAX_DEPTH (32 * KiB)
+#define MAX_QEMU_BUFFER_SIZE (4 * KiB)
#define DP_CORE_REG_ARRAY_SIZE (0x3AF >> 2)
#define DP_AVBUF_REG_ARRAY_SIZE (0x238 >> 2)
diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h
index b98d500..902a12b 100644
--- a/include/hw/intc/mips_gic.h
+++ b/include/hw/intc/mips_gic.h
@@ -11,6 +11,7 @@
#ifndef MIPS_GIC_H
#define MIPS_GIC_H
+#include "qemu/units.h"
#include "hw/timer/mips_gictimer.h"
#include "cpu.h"
/*
@@ -19,7 +20,7 @@
/* The MIPS default location */
#define GIC_BASE_ADDR 0x1bdc0000ULL
-#define GIC_ADDRSPACE_SZ (128 * 1024)
+#define GIC_ADDRSPACE_SZ (128 * KiB)
/* Constants */
#define GIC_POL_POS 1
diff --git a/include/hw/mips/bios.h b/include/hw/mips/bios.h
index b4b88ac..d67ef33 100644
--- a/include/hw/mips/bios.h
+++ b/include/hw/mips/bios.h
@@ -1,6 +1,7 @@
+#include "qemu/units.h"
#include "cpu.h"
-#define BIOS_SIZE (4 * 1024 * 1024)
+#define BIOS_SIZE (4 * MiB)
#ifdef TARGET_WORDS_BIGENDIAN
#define BIOS_FILENAME "mips_bios.bin"
#else
diff --git a/include/hw/net/allwinner_emac.h b/include/hw/net/allwinner_emac.h
index 4cc8aab..905a43d 100644
--- a/include/hw/net/allwinner_emac.h
+++ b/include/hw/net/allwinner_emac.h
@@ -23,6 +23,7 @@
#ifndef ALLWINNER_EMAC_H
#define ALLWINNER_EMAC_H
+#include "qemu/units.h"
#include "net/net.h"
#include "qemu/fifo8.h"
#include "hw/net/mii.h"
@@ -125,8 +126,8 @@
#define EMAC_INT_RX (1 << 8)
/* Due to lack of specifications, size of fifos is chosen arbitrarily */
-#define TX_FIFO_SIZE (4 * 1024)
-#define RX_FIFO_SIZE (32 * 1024)
+#define TX_FIFO_SIZE (4 * KiB)
+#define RX_FIFO_SIZE (32 * KiB)
#define NUM_TX_FIFOS 2
#define RX_HDR_SIZE 8
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 7e02816..7e5de1a 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -1,6 +1,7 @@
#ifndef HW_SPAPR_H
#define HW_SPAPR_H
+#include "qemu/units.h"
#include "sysemu/dma.h"
#include "hw/boards.h"
#include "hw/ppc/xics.h"
@@ -749,8 +750,8 @@
*/
#define SPAPR_MAX_RAM_SLOTS 32
-/* 1GB alignment for device memory region */
-#define SPAPR_DEVICE_MEM_ALIGN (1ULL << 30)
+/* 1GB alignment for hotplug memory region */
+#define SPAPR_DEVICE_MEM_ALIGN (1 * GiB)
/*
* Number of 32 bit words in each LMB list entry in ibm,dynamic-memory
diff --git a/include/hw/virtio/virtio-net.h b/include/hw/virtio/virtio-net.h
index 02484dc..4d7f3c8 100644
--- a/include/hw/virtio/virtio-net.h
+++ b/include/hw/virtio/virtio-net.h
@@ -14,6 +14,7 @@
#ifndef QEMU_VIRTIO_NET_H
#define QEMU_VIRTIO_NET_H
+#include "qemu/units.h"
#include "standard-headers/linux/virtio_net.h"
#include "hw/virtio/virtio.h"
@@ -44,7 +45,7 @@
} virtio_net_conf;
/* Maximum packet size we can receive from tap device: header + 64k */
-#define VIRTIO_NET_MAX_BUFSIZE (sizeof(struct virtio_net_hdr) + (64 << 10))
+#define VIRTIO_NET_MAX_BUFSIZE (sizeof(struct virtio_net_hdr) + (64 * KiB))
typedef struct VirtIONetQueue {
VirtQueue *rx_vq;
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
index 274d419..47aaa3b 100644
--- a/include/qemu/cutils.h
+++ b/include/qemu/cutils.h
@@ -155,13 +155,6 @@
int qemu_strtosz_MiB(const char *nptr, char **end, uint64_t *result);
int qemu_strtosz_metric(const char *nptr, char **end, uint64_t *result);
-#define K_BYTE (1ULL << 10)
-#define M_BYTE (1ULL << 20)
-#define G_BYTE (1ULL << 30)
-#define T_BYTE (1ULL << 40)
-#define P_BYTE (1ULL << 50)
-#define E_BYTE (1ULL << 60)
-
/* used to print char* safely */
#define STR_OR_NULL(str) ((str) ? (str) : "null")
diff --git a/include/qemu/units.h b/include/qemu/units.h
new file mode 100644
index 0000000..692db3f
--- /dev/null
+++ b/include/qemu/units.h
@@ -0,0 +1,20 @@
+/*
+ * IEC binary prefixes definitions
+ *
+ * Copyright (C) 2015 Nikunj A Dadhania, IBM Corporation
+ * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_UNITS_H
+#define QEMU_UNITS_H
+
+#define KiB (INT64_C(1) << 10)
+#define MiB (INT64_C(1) << 20)
+#define GiB (INT64_C(1) << 30)
+#define TiB (INT64_C(1) << 40)
+#define PiB (INT64_C(1) << 50)
+#define EiB (INT64_C(1) << 60)
+
+#endif
diff --git a/linux-user/main.c b/linux-user/main.c
index 84e9ec9..52b5a61 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -17,6 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-version.h"
#include <sys/syscall.h>
#include <sys/resource.h>
@@ -274,9 +275,9 @@
}
if (*p == 'M') {
- guest_stack_size *= 1024 * 1024;
+ guest_stack_size *= MiB;
} else if (*p == 'k' || *p == 'K') {
- guest_stack_size *= 1024;
+ guest_stack_size *= KiB;
}
}
diff --git a/monitor.c b/monitor.c
index 567668a..3a0ea0c 100644
--- a/monitor.c
+++ b/monitor.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <dirent.h>
#include "cpu.h"
#include "hw/hw.h"
@@ -3303,7 +3304,7 @@
monitor_printf(mon, "enter a positive value\n");
goto fail;
}
- val <<= 20;
+ val *= MiB;
}
qdict_put_int(qdict, key, val);
}
diff --git a/nbd/client.c b/nbd/client.c
index 232ff4f..40b74d9 100644
--- a/nbd/client.c
+++ b/nbd/client.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016-2017 Red Hat, Inc.
+ * Copyright (C) 2016-2018 Red Hat, Inc.
* Copyright (C) 2005 Anthony Liguori <anthony@codemonkey.ws>
*
* Network Block Device Client Side
@@ -831,7 +831,7 @@
if (info->structured_reply && base_allocation) {
result = nbd_negotiate_simple_meta_context(
- ioc, name, "base:allocation",
+ ioc, name, info->x_dirty_bitmap ?: "base:allocation",
&info->meta_base_allocation_id, errp);
if (result < 0) {
goto fail;
diff --git a/nbd/server.c b/nbd/server.c
index 50ac8bf..e52b76b 100644
--- a/nbd/server.c
+++ b/nbd/server.c
@@ -1977,7 +1977,7 @@
bdrv_dirty_bitmap_unlock(bitmap);
- assert(offset > end);
+ assert(offset < end);
*length = end - offset;
return i;
}
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 577ce5e..90e554e 100644
--- a/qapi/block-core.json
+++ b/qapi/block-core.json
@@ -3471,12 +3471,17 @@
#
# @tls-creds: TLS credentials ID
#
+# @x-dirty-bitmap: A "qemu:dirty-bitmap:NAME" string to query in place of
+# traditional "base:allocation" block status (see
+# NBD_OPT_LIST_META_CONTEXT in the NBD protocol) (since 3.0)
+#
# Since: 2.9
##
{ 'struct': 'BlockdevOptionsNbd',
'data': { 'server': 'SocketAddress',
'*export': 'str',
- '*tls-creds': 'str' } }
+ '*tls-creds': 'str',
+ '*x-dirty-bitmap': 'str' } }
##
# @BlockdevOptionsRaw:
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index e3d8c2c..223681b 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -242,6 +242,7 @@
# There are still some false positives, but this catches most
# common cases.
our $typeTypedefs = qr{(?x:
+ (?![KMGTPE]iB) # IEC binary prefix (do not match)
[A-Z][A-Z\d_]*[a-z][A-Za-z\d_]* # camelcase
| [A-Z][A-Z\d_]*AIOCB # all uppercase
| [A-Z][A-Z\d_]*CPU # all uppercase
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1e6a7d0..b0b87c3 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/cutils.h"
#include "qemu/bitops.h"
@@ -65,9 +66,6 @@
int associativity;
};
-#define KiB 1024
-#define MiB (1024 * 1024)
-
/*
* Known CPUID 2 cache descriptors.
* From Intel SDM Volume 2A, CPUID instruction
@@ -751,7 +749,7 @@
#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
#define TCG_EXT4_FEATURES 0
-#define TCG_SVM_FEATURES 0
+#define TCG_SVM_FEATURES CPUID_SVM_NPT
#define TCG_KVM_FEATURES 0
#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
@@ -5415,6 +5413,7 @@
DEFINE_PROP_BOOL("hv-stimer", X86CPU, hyperv_stimer, false),
DEFINE_PROP_BOOL("hv-frequencies", X86CPU, hyperv_frequencies, false),
DEFINE_PROP_BOOL("hv-reenlightenment", X86CPU, hyperv_reenlightenment, false),
+ DEFINE_PROP_BOOL("hv-tlbflush", X86CPU, hyperv_tlbflush, false),
DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, true),
DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 8eaefee..2c5a0d9 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -211,6 +211,7 @@
#define HF2_VINTR_SHIFT 3 /* value of V_INTR_MASKING bit */
#define HF2_SMM_INSIDE_NMI_SHIFT 4 /* CPU serving SMI nested inside NMI */
#define HF2_MPX_PR_SHIFT 5 /* BNDCFGx.BNDPRESERVE */
+#define HF2_NPT_SHIFT 6 /* Nested Paging enabled */
#define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)
#define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)
@@ -218,6 +219,7 @@
#define HF2_VINTR_MASK (1 << HF2_VINTR_SHIFT)
#define HF2_SMM_INSIDE_NMI_MASK (1 << HF2_SMM_INSIDE_NMI_SHIFT)
#define HF2_MPX_PR_MASK (1 << HF2_MPX_PR_SHIFT)
+#define HF2_NPT_MASK (1 << HF2_NPT_SHIFT)
#define CR0_PE_SHIFT 0
#define CR0_MP_SHIFT 1
@@ -1265,12 +1267,16 @@
uint16_t intercept_dr_read;
uint16_t intercept_dr_write;
uint32_t intercept_exceptions;
+ uint64_t nested_cr3;
+ uint32_t nested_pg_mode;
uint8_t v_tpr;
/* KVM states, automatically cleared on reset */
uint8_t nmi_injected;
uint8_t nmi_pending;
+ uintptr_t retaddr;
+
/* Fields up to this point are cleared by a CPU reset */
struct {} end_reset_fields;
@@ -1367,6 +1373,7 @@
bool hyperv_stimer;
bool hyperv_frequencies;
bool hyperv_reenlightenment;
+ bool hyperv_tlbflush;
bool check_cpuid;
bool enforce_cpuid;
bool expose_kvm;
diff --git a/target/i386/excp_helper.c b/target/i386/excp_helper.c
index cb4d1b7..37a33d5 100644
--- a/target/i386/excp_helper.c
+++ b/target/i386/excp_helper.c
@@ -157,6 +157,209 @@
#else
+static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
+ int *prot)
+{
+ CPUX86State *env = &X86_CPU(cs)->env;
+ uint64_t rsvd_mask = PG_HI_RSVD_MASK;
+ uint64_t ptep, pte;
+ uint64_t exit_info_1 = 0;
+ target_ulong pde_addr, pte_addr;
+ uint32_t page_offset;
+ int page_size;
+
+ if (likely(!(env->hflags2 & HF2_NPT_MASK))) {
+ return gphys;
+ }
+
+ if (!(env->nested_pg_mode & SVM_NPT_NXE)) {
+ rsvd_mask |= PG_NX_MASK;
+ }
+
+ if (env->nested_pg_mode & SVM_NPT_PAE) {
+ uint64_t pde, pdpe;
+ target_ulong pdpe_addr;
+
+#ifdef TARGET_X86_64
+ if (env->nested_pg_mode & SVM_NPT_LMA) {
+ uint64_t pml5e;
+ uint64_t pml4e_addr, pml4e;
+
+ pml5e = env->nested_cr3;
+ ptep = PG_NX_MASK | PG_USER_MASK | PG_RW_MASK;
+
+ pml4e_addr = (pml5e & PG_ADDRESS_MASK) +
+ (((gphys >> 39) & 0x1ff) << 3);
+ pml4e = x86_ldq_phys(cs, pml4e_addr);
+ if (!(pml4e & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ if (pml4e & (rsvd_mask | PG_PSE_MASK)) {
+ goto do_fault_rsvd;
+ }
+ if (!(pml4e & PG_ACCESSED_MASK)) {
+ pml4e |= PG_ACCESSED_MASK;
+ x86_stl_phys_notdirty(cs, pml4e_addr, pml4e);
+ }
+ ptep &= pml4e ^ PG_NX_MASK;
+ pdpe_addr = (pml4e & PG_ADDRESS_MASK) +
+ (((gphys >> 30) & 0x1ff) << 3);
+ pdpe = x86_ldq_phys(cs, pdpe_addr);
+ if (!(pdpe & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ if (pdpe & rsvd_mask) {
+ goto do_fault_rsvd;
+ }
+ ptep &= pdpe ^ PG_NX_MASK;
+ if (!(pdpe & PG_ACCESSED_MASK)) {
+ pdpe |= PG_ACCESSED_MASK;
+ x86_stl_phys_notdirty(cs, pdpe_addr, pdpe);
+ }
+ if (pdpe & PG_PSE_MASK) {
+ /* 1 GB page */
+ page_size = 1024 * 1024 * 1024;
+ pte_addr = pdpe_addr;
+ pte = pdpe;
+ goto do_check_protect;
+ }
+ } else
+#endif
+ {
+ pdpe_addr = (env->nested_cr3 & ~0x1f) + ((gphys >> 27) & 0x18);
+ pdpe = x86_ldq_phys(cs, pdpe_addr);
+ if (!(pdpe & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ rsvd_mask |= PG_HI_USER_MASK;
+ if (pdpe & (rsvd_mask | PG_NX_MASK)) {
+ goto do_fault_rsvd;
+ }
+ ptep = PG_NX_MASK | PG_USER_MASK | PG_RW_MASK;
+ }
+
+ pde_addr = (pdpe & PG_ADDRESS_MASK) + (((gphys >> 21) & 0x1ff) << 3);
+ pde = x86_ldq_phys(cs, pde_addr);
+ if (!(pde & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ if (pde & rsvd_mask) {
+ goto do_fault_rsvd;
+ }
+ ptep &= pde ^ PG_NX_MASK;
+ if (pde & PG_PSE_MASK) {
+ /* 2 MB page */
+ page_size = 2048 * 1024;
+ pte_addr = pde_addr;
+ pte = pde;
+ goto do_check_protect;
+ }
+ /* 4 KB page */
+ if (!(pde & PG_ACCESSED_MASK)) {
+ pde |= PG_ACCESSED_MASK;
+ x86_stl_phys_notdirty(cs, pde_addr, pde);
+ }
+ pte_addr = (pde & PG_ADDRESS_MASK) + (((gphys >> 12) & 0x1ff) << 3);
+ pte = x86_ldq_phys(cs, pte_addr);
+ if (!(pte & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ if (pte & rsvd_mask) {
+ goto do_fault_rsvd;
+ }
+ /* combine pde and pte nx, user and rw protections */
+ ptep &= pte ^ PG_NX_MASK;
+ page_size = 4096;
+ } else {
+ uint32_t pde;
+
+ /* page directory entry */
+ pde_addr = (env->nested_cr3 & ~0xfff) + ((gphys >> 20) & 0xffc);
+ pde = x86_ldl_phys(cs, pde_addr);
+ if (!(pde & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ ptep = pde | PG_NX_MASK;
+
+ /* if PSE bit is set, then we use a 4MB page */
+ if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
+ page_size = 4096 * 1024;
+ pte_addr = pde_addr;
+
+ /* Bits 20-13 provide bits 39-32 of the address, bit 21 is reserved.
+ * Leave bits 20-13 in place for setting accessed/dirty bits below.
+ */
+ pte = pde | ((pde & 0x1fe000LL) << (32 - 13));
+ rsvd_mask = 0x200000;
+ goto do_check_protect_pse36;
+ }
+
+ if (!(pde & PG_ACCESSED_MASK)) {
+ pde |= PG_ACCESSED_MASK;
+ x86_stl_phys_notdirty(cs, pde_addr, pde);
+ }
+
+ /* page directory entry */
+ pte_addr = (pde & ~0xfff) + ((gphys >> 10) & 0xffc);
+ pte = x86_ldl_phys(cs, pte_addr);
+ if (!(pte & PG_PRESENT_MASK)) {
+ goto do_fault;
+ }
+ /* combine pde and pte user and rw protections */
+ ptep &= pte | PG_NX_MASK;
+ page_size = 4096;
+ rsvd_mask = 0;
+ }
+
+ do_check_protect:
+ rsvd_mask |= (page_size - 1) & PG_ADDRESS_MASK & ~PG_PSE_PAT_MASK;
+ do_check_protect_pse36:
+ if (pte & rsvd_mask) {
+ goto do_fault_rsvd;
+ }
+ ptep ^= PG_NX_MASK;
+
+ if (!(ptep & PG_USER_MASK)) {
+ goto do_fault_protect;
+ }
+ if (ptep & PG_NX_MASK) {
+ if (access_type == MMU_INST_FETCH) {
+ goto do_fault_protect;
+ }
+ *prot &= ~PAGE_EXEC;
+ }
+ if (!(ptep & PG_RW_MASK)) {
+ if (access_type == MMU_DATA_STORE) {
+ goto do_fault_protect;
+ }
+ *prot &= ~PAGE_WRITE;
+ }
+
+ pte &= PG_ADDRESS_MASK & ~(page_size - 1);
+ page_offset = gphys & (page_size - 1);
+ return pte + page_offset;
+
+ do_fault_rsvd:
+ exit_info_1 |= SVM_NPTEXIT_RSVD;
+ do_fault_protect:
+ exit_info_1 |= SVM_NPTEXIT_P;
+ do_fault:
+ x86_stq_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2),
+ gphys);
+ exit_info_1 |= SVM_NPTEXIT_US;
+ if (access_type == MMU_DATA_STORE) {
+ exit_info_1 |= SVM_NPTEXIT_RW;
+ } else if (access_type == MMU_INST_FETCH) {
+ exit_info_1 |= SVM_NPTEXIT_ID;
+ }
+ if (prot) {
+ exit_info_1 |= SVM_NPTEXIT_GPA;
+ } else { /* page table access */
+ exit_info_1 |= SVM_NPTEXIT_GPT;
+ }
+ cpu_vmexit(env, SVM_EXIT_NPF, exit_info_1, env->retaddr);
+}
+
/* return value:
* -1 = cannot handle fault
* 0 = nothing more to do
@@ -224,6 +427,7 @@
if (la57) {
pml5e_addr = ((env->cr[3] & ~0xfff) +
(((addr >> 48) & 0x1ff) << 3)) & a20_mask;
+ pml5e_addr = get_hphys(cs, pml5e_addr, MMU_DATA_STORE, NULL);
pml5e = x86_ldq_phys(cs, pml5e_addr);
if (!(pml5e & PG_PRESENT_MASK)) {
goto do_fault;
@@ -243,6 +447,7 @@
pml4e_addr = ((pml5e & PG_ADDRESS_MASK) +
(((addr >> 39) & 0x1ff) << 3)) & a20_mask;
+ pml4e_addr = get_hphys(cs, pml4e_addr, MMU_DATA_STORE, false);
pml4e = x86_ldq_phys(cs, pml4e_addr);
if (!(pml4e & PG_PRESENT_MASK)) {
goto do_fault;
@@ -257,6 +462,7 @@
ptep &= pml4e ^ PG_NX_MASK;
pdpe_addr = ((pml4e & PG_ADDRESS_MASK) + (((addr >> 30) & 0x1ff) << 3)) &
a20_mask;
+ pdpe_addr = get_hphys(cs, pdpe_addr, MMU_DATA_STORE, NULL);
pdpe = x86_ldq_phys(cs, pdpe_addr);
if (!(pdpe & PG_PRESENT_MASK)) {
goto do_fault;
@@ -282,6 +488,7 @@
/* XXX: load them when cr3 is loaded ? */
pdpe_addr = ((env->cr[3] & ~0x1f) + ((addr >> 27) & 0x18)) &
a20_mask;
+ pdpe_addr = get_hphys(cs, pdpe_addr, MMU_DATA_STORE, false);
pdpe = x86_ldq_phys(cs, pdpe_addr);
if (!(pdpe & PG_PRESENT_MASK)) {
goto do_fault;
@@ -295,6 +502,7 @@
pde_addr = ((pdpe & PG_ADDRESS_MASK) + (((addr >> 21) & 0x1ff) << 3)) &
a20_mask;
+ pde_addr = get_hphys(cs, pde_addr, MMU_DATA_STORE, NULL);
pde = x86_ldq_phys(cs, pde_addr);
if (!(pde & PG_PRESENT_MASK)) {
goto do_fault;
@@ -317,6 +525,7 @@
}
pte_addr = ((pde & PG_ADDRESS_MASK) + (((addr >> 12) & 0x1ff) << 3)) &
a20_mask;
+ pte_addr = get_hphys(cs, pte_addr, MMU_DATA_STORE, NULL);
pte = x86_ldq_phys(cs, pte_addr);
if (!(pte & PG_PRESENT_MASK)) {
goto do_fault;
@@ -333,6 +542,7 @@
/* page directory entry */
pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) &
a20_mask;
+ pde_addr = get_hphys(cs, pde_addr, MMU_DATA_STORE, NULL);
pde = x86_ldl_phys(cs, pde_addr);
if (!(pde & PG_PRESENT_MASK)) {
goto do_fault;
@@ -360,6 +570,7 @@
/* page directory entry */
pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) &
a20_mask;
+ pte_addr = get_hphys(cs, pte_addr, MMU_DATA_STORE, NULL);
pte = x86_ldl_phys(cs, pte_addr);
if (!(pte & PG_PRESENT_MASK)) {
goto do_fault;
@@ -442,12 +653,13 @@
/* align to page_size */
pte &= PG_ADDRESS_MASK & ~(page_size - 1);
+ page_offset = addr & (page_size - 1);
+ paddr = get_hphys(cs, pte + page_offset, is_write1, &prot);
/* Even if 4MB pages, we map only one 4KB page in the cache to
avoid filling it too fast */
vaddr = addr & TARGET_PAGE_MASK;
- page_offset = vaddr & (page_size - 1);
- paddr = pte + page_offset;
+ paddr &= TARGET_PAGE_MASK;
assert(prot & (1 << is_write1));
tlb_set_page_with_attrs(cs, vaddr, paddr, cpu_get_mem_attrs(env),
diff --git a/target/i386/hyperv-proto.h b/target/i386/hyperv-proto.h
index 93352eb..d6d5a79 100644
--- a/target/i386/hyperv-proto.h
+++ b/target/i386/hyperv-proto.h
@@ -58,6 +58,7 @@
#define HV_APIC_ACCESS_RECOMMENDED (1u << 3)
#define HV_SYSTEM_RESET_RECOMMENDED (1u << 4)
#define HV_RELAXED_TIMING_RECOMMENDED (1u << 5)
+#define HV_EX_PROCESSOR_MASKS_RECOMMENDED (1u << 11)
/*
* Basic virtualized MSRs
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 032f0ad..ebb2d23 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -601,7 +601,8 @@
cpu->hyperv_runtime ||
cpu->hyperv_synic ||
cpu->hyperv_stimer ||
- cpu->hyperv_reenlightenment);
+ cpu->hyperv_reenlightenment ||
+ cpu->hyperv_tlbflush);
}
static int kvm_arch_set_tsc_khz(CPUState *cs)
@@ -839,6 +840,18 @@
if (cpu->hyperv_vapic) {
c->eax |= HV_APIC_ACCESS_RECOMMENDED;
}
+ if (cpu->hyperv_tlbflush) {
+ if (kvm_check_extension(cs->kvm_state,
+ KVM_CAP_HYPERV_TLBFLUSH) <= 0) {
+ fprintf(stderr, "Hyper-V TLB flush support "
+ "(requested by 'hv-tlbflush' cpu flag) "
+ " is not supported by kernel\n");
+ return -ENOSYS;
+ }
+ c->eax |= HV_REMOTE_TLB_FLUSH_RECOMMENDED;
+ c->eax |= HV_EX_PROCESSOR_MASKS_RECOMMENDED;
+ }
+
c->ebx = cpu->hyperv_spinlock_attempts;
c = &cpuid_data.entries[cpuid_i++];
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 4d98d36..8b64dff 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -935,6 +935,26 @@
}
};
+static bool svm_npt_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return !!(env->hflags2 & HF2_NPT_MASK);
+}
+
+static const VMStateDescription vmstate_svm_npt = {
+ .name = "cpu/svn_npt",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = svm_npt_needed,
+ .fields = (VMStateField[]){
+ VMSTATE_UINT64(env.nested_cr3, X86CPU),
+ VMSTATE_UINT32(env.nested_pg_mode, X86CPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
VMStateDescription vmstate_x86_cpu = {
.name = "cpu",
.version_id = 12,
@@ -1059,6 +1079,7 @@
&vmstate_mcg_ext_ctl,
&vmstate_msr_intel_pt,
&vmstate_msr_virt_ssbd,
+ &vmstate_svm_npt,
NULL
}
};
diff --git a/target/i386/mem_helper.c b/target/i386/mem_helper.c
index a8ae694..30c26b9 100644
--- a/target/i386/mem_helper.c
+++ b/target/i386/mem_helper.c
@@ -202,13 +202,13 @@
void tlb_fill(CPUState *cs, target_ulong addr, int size,
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
int ret;
+ env->retaddr = retaddr;
ret = x86_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
if (ret) {
- X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
-
raise_exception_err_ra(env, cs->exception_index, env->error_code, retaddr);
}
}
diff --git a/target/i386/monitor.c b/target/i386/monitor.c
index 6bbb3a9..74a13c5 100644
--- a/target/i386/monitor.c
+++ b/target/i386/monitor.c
@@ -35,21 +35,28 @@
#include "sev_i386.h"
#include "qapi/qapi-commands-misc.h"
-
-static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr,
- hwaddr pte, hwaddr mask)
+/* Perform linear address sign extension */
+static hwaddr addr_canonical(CPUArchState *env, hwaddr addr)
{
#ifdef TARGET_X86_64
if (env->cr[4] & CR4_LA57_MASK) {
if (addr & (1ULL << 56)) {
- addr |= -1LL << 57;
+ addr |= (hwaddr)-(1LL << 57);
}
} else {
if (addr & (1ULL << 47)) {
- addr |= -1LL << 48;
+ addr |= (hwaddr)-(1LL << 48);
}
}
#endif
+ return addr;
+}
+
+static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr,
+ hwaddr pte, hwaddr mask)
+{
+ addr = addr_canonical(env, addr);
+
monitor_printf(mon, TARGET_FMT_plx ": " TARGET_FMT_plx
" %c%c%c%c%c%c%c%c%c\n",
addr,
@@ -243,8 +250,8 @@
}
}
-static void mem_print(Monitor *mon, hwaddr *pstart,
- int *plast_prot,
+static void mem_print(Monitor *mon, CPUArchState *env,
+ hwaddr *pstart, int *plast_prot,
hwaddr end, int prot)
{
int prot1;
@@ -253,7 +260,9 @@
if (*pstart != -1) {
monitor_printf(mon, TARGET_FMT_plx "-" TARGET_FMT_plx " "
TARGET_FMT_plx " %c%c%c\n",
- *pstart, end, end - *pstart,
+ addr_canonical(env, *pstart),
+ addr_canonical(env, end),
+ addr_canonical(env, end - *pstart),
prot1 & PG_USER_MASK ? 'u' : '-',
'r',
prot1 & PG_RW_MASK ? 'w' : '-');
@@ -283,7 +292,7 @@
if (pde & PG_PRESENT_MASK) {
if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
prot = pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK);
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
} else {
for(l2 = 0; l2 < 1024; l2++) {
cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4);
@@ -295,16 +304,16 @@
} else {
prot = 0;
}
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
/* Flush last range */
- mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
+ mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0);
}
static void mem_info_pae32(Monitor *mon, CPUArchState *env)
@@ -332,7 +341,7 @@
if (pde & PG_PSE_MASK) {
prot = pde & (PG_USER_MASK | PG_RW_MASK |
PG_PRESENT_MASK);
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
} else {
pt_addr = pde & 0x3fffffffff000ULL;
for (l3 = 0; l3 < 512; l3++) {
@@ -345,21 +354,21 @@
} else {
prot = 0;
}
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
/* Flush last range */
- mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
+ mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0);
}
@@ -389,7 +398,7 @@
prot = pdpe & (PG_USER_MASK | PG_RW_MASK |
PG_PRESENT_MASK);
prot &= pml4e;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
} else {
pd_addr = pdpe & 0x3fffffffff000ULL;
for (l3 = 0; l3 < 512; l3++) {
@@ -401,7 +410,8 @@
prot = pde & (PG_USER_MASK | PG_RW_MASK |
PG_PRESENT_MASK);
prot &= pml4e & pdpe;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start,
+ &last_prot, end, prot);
} else {
pt_addr = pde & 0x3fffffffff000ULL;
for (l4 = 0; l4 < 512; l4++) {
@@ -418,27 +428,29 @@
} else {
prot = 0;
}
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start,
+ &last_prot, end, prot);
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start,
+ &last_prot, end, prot);
}
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
} else {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
/* Flush last range */
- mem_print(mon, &start, &last_prot, (hwaddr)1 << 48, 0);
+ mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 48, 0);
}
static void mem_info_la57(Monitor *mon, CPUArchState *env)
@@ -457,7 +469,7 @@
end = l0 << 48;
if (!(pml5e & PG_PRESENT_MASK)) {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -468,7 +480,7 @@
end = (l0 << 48) + (l1 << 39);
if (!(pml4e & PG_PRESENT_MASK)) {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -479,7 +491,7 @@
end = (l0 << 48) + (l1 << 39) + (l2 << 30);
if (pdpe & PG_PRESENT_MASK) {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -487,7 +499,7 @@
prot = pdpe & (PG_USER_MASK | PG_RW_MASK |
PG_PRESENT_MASK);
prot &= pml5e & pml4e;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -498,7 +510,7 @@
end = (l0 << 48) + (l1 << 39) + (l2 << 30) + (l3 << 21);
if (pde & PG_PRESENT_MASK) {
prot = 0;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -506,7 +518,7 @@
prot = pde & (PG_USER_MASK | PG_RW_MASK |
PG_PRESENT_MASK);
prot &= pml5e & pml4e & pdpe;
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
continue;
}
@@ -523,14 +535,14 @@
} else {
prot = 0;
}
- mem_print(mon, &start, &last_prot, end, prot);
+ mem_print(mon, env, &start, &last_prot, end, prot);
}
}
}
}
}
/* Flush last range */
- mem_print(mon, &start, &last_prot, (hwaddr)1 << 57, 0);
+ mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 57, 0);
}
#endif /* TARGET_X86_64 */
diff --git a/target/i386/svm.h b/target/i386/svm.h
index 922c8fd..23a3a04 100644
--- a/target/i386/svm.h
+++ b/target/i386/svm.h
@@ -130,6 +130,20 @@
#define SVM_CR0_SELECTIVE_MASK (1 << 3 | 1) /* TS and MP */
+#define SVM_NPT_ENABLED (1 << 0)
+
+#define SVM_NPT_PAE (1 << 0)
+#define SVM_NPT_LMA (1 << 1)
+#define SVM_NPT_NXE (1 << 2)
+
+#define SVM_NPTEXIT_P (1ULL << 0)
+#define SVM_NPTEXIT_RW (1ULL << 1)
+#define SVM_NPTEXIT_US (1ULL << 2)
+#define SVM_NPTEXIT_RSVD (1ULL << 3)
+#define SVM_NPTEXIT_ID (1ULL << 4)
+#define SVM_NPTEXIT_GPA (1ULL << 32)
+#define SVM_NPTEXIT_GPT (1ULL << 33)
+
struct QEMU_PACKED vmcb_control_area {
uint16_t intercept_cr_read;
uint16_t intercept_cr_write;
diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c
index f245aec..342ece0 100644
--- a/target/i386/svm_helper.c
+++ b/target/i386/svm_helper.c
@@ -124,6 +124,7 @@
{
CPUState *cs = CPU(x86_env_get_cpu(env));
target_ulong addr;
+ uint64_t nested_ctl;
uint32_t event_inj;
uint32_t int_ctl;
@@ -206,6 +207,26 @@
control.intercept_exceptions
));
+ nested_ctl = x86_ldq_phys(cs, env->vm_vmcb + offsetof(struct vmcb,
+ control.nested_ctl));
+ if (nested_ctl & SVM_NPT_ENABLED) {
+ env->nested_cr3 = x86_ldq_phys(cs,
+ env->vm_vmcb + offsetof(struct vmcb,
+ control.nested_cr3));
+ env->hflags2 |= HF2_NPT_MASK;
+
+ env->nested_pg_mode = 0;
+ if (env->cr[4] & CR4_PAE_MASK) {
+ env->nested_pg_mode |= SVM_NPT_PAE;
+ }
+ if (env->hflags & HF_LMA_MASK) {
+ env->nested_pg_mode |= SVM_NPT_LMA;
+ }
+ if (env->efer & MSR_EFER_NXE) {
+ env->nested_pg_mode |= SVM_NPT_NXE;
+ }
+ }
+
/* enable intercepts */
env->hflags |= HF_SVMI_MASK;
@@ -616,6 +637,7 @@
x86_stl_phys(cs,
env->vm_vmcb + offsetof(struct vmcb, control.int_state), 0);
}
+ env->hflags2 &= ~HF2_NPT_MASK;
/* Save the VM state in the vmcb */
svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.es),
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 98ce179..e6739e6 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -17,6 +17,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "exec/helper-proto.h"
#include "sysemu/kvm.h"
@@ -1090,11 +1091,10 @@
pa = entry->RPN & mask;
/* Extend the physical address to 36 bits */
pa |= (hwaddr)(entry->RPN & 0xF) << 32;
- size /= 1024;
- if (size >= 1024) {
- snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / 1024);
+ if (size >= 1 * MiB) {
+ snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / MiB);
} else {
- snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size);
+ snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size / KiB);
}
cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
(uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry->PID,
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index 34844ee..c9a6132 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
@@ -726,10 +727,10 @@
bool print_header = true;
if (sz >= 0x100000) {
- sz >>= 20;
+ sz /= MiB;
sz_text = "MB";
} else {
- sz >>= 10;
+ sz /= KiB;
sz_text = "KB";
}
diff --git a/tests/benchmark-crypto-cipher.c b/tests/benchmark-crypto-cipher.c
index cf98443..f5a0d0b 100644
--- a/tests/benchmark-crypto-cipher.c
+++ b/tests/benchmark-crypto-cipher.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/cipher.h"
@@ -56,8 +57,7 @@
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
-
+ total /= MiB;
g_print("cbc(aes128): ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -78,7 +78,7 @@
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/cipher/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_cipher_speed);
diff --git a/tests/benchmark-crypto-hash.c b/tests/benchmark-crypto-hash.c
index 122bfb6..9b6f7a9 100644
--- a/tests/benchmark-crypto-hash.c
+++ b/tests/benchmark-crypto-hash.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/hash.h"
@@ -39,7 +40,7 @@
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
+ total /= MiB;
g_print("sha256: ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -57,7 +58,7 @@
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/hash/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_hash_speed);
diff --git a/tests/benchmark-crypto-hmac.c b/tests/benchmark-crypto-hmac.c
index c30250d..f1dfa24 100644
--- a/tests/benchmark-crypto-hmac.c
+++ b/tests/benchmark-crypto-hmac.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/hmac.h"
@@ -53,8 +54,7 @@
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
-
+ total /= MiB;
g_print("hmac(sha256): ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -72,7 +72,7 @@
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/hmac/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_hmac_speed);
diff --git a/tests/qemu-iotests/222 b/tests/qemu-iotests/222
new file mode 100644
index 0000000..ff3bfc1
--- /dev/null
+++ b/tests/qemu-iotests/222
@@ -0,0 +1,155 @@
+#!/usr/bin/env python
+#
+# This test covers the basic fleecing workflow, which provides a
+# point-in-time snapshot of a node that can be queried over NBD.
+#
+# Copyright (C) 2018 Red Hat, Inc.
+# John helped, too.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+# Creator/Owner: John Snow <jsnow@redhat.com>
+
+import iotests
+from iotests import log, qemu_img, qemu_io, qemu_io_silent
+
+iotests.verify_platform(['linux'])
+
+patterns = [("0x5d", "0", "64k"),
+ ("0xd5", "1M", "64k"),
+ ("0xdc", "32M", "64k"),
+ ("0xcd", "0x3ff0000", "64k")] # 64M - 64K
+
+overwrite = [("0xab", "0", "64k"), # Full overwrite
+ ("0xad", "0x00f8000", "64k"), # Partial-left (1M-32K)
+ ("0x1d", "0x2008000", "64k"), # Partial-right (32M+32K)
+ ("0xea", "0x3fe0000", "64k")] # Adjacent-left (64M - 128K)
+
+zeroes = [("0", "0x00f8000", "32k"), # Left-end of partial-left (1M-32K)
+ ("0", "0x2010000", "32k"), # Right-end of partial-right (32M+64K)
+ ("0", "0x3fe0000", "64k")] # overwrite[3]
+
+remainder = [("0xd5", "0x108000", "32k"), # Right-end of partial-left [1]
+ ("0xdc", "32M", "32k"), # Left-end of partial-right [2]
+ ("0xcd", "0x3ff0000", "64k")] # patterns[3]
+
+with iotests.FilePath('base.img') as base_img_path, \
+ iotests.FilePath('fleece.img') as fleece_img_path, \
+ iotests.FilePath('nbd.sock') as nbd_sock_path, \
+ iotests.VM() as vm:
+
+ log('--- Setting up images ---')
+ log('')
+
+ assert qemu_img('create', '-f', iotests.imgfmt, base_img_path, '64M') == 0
+ assert qemu_img('create', '-f', "qcow2", fleece_img_path, '64M') == 0
+
+ for p in patterns:
+ qemu_io('-f', iotests.imgfmt,
+ '-c', 'write -P%s %s %s' % p, base_img_path)
+
+ log('Done')
+
+ log('')
+ log('--- Launching VM ---')
+ log('')
+
+ vm.add_drive(base_img_path)
+ vm.launch()
+ log('Done')
+
+ log('')
+ log('--- Setting up Fleecing Graph ---')
+ log('')
+
+ src_node = "drive0"
+ tgt_node = "fleeceNode"
+
+ # create tgt_node backed by src_node
+ log(vm.qmp("blockdev-add", **{
+ "driver": "qcow2",
+ "node-name": tgt_node,
+ "file": {
+ "driver": "file",
+ "filename": fleece_img_path,
+ },
+ "backing": src_node,
+ }))
+
+ # Establish COW from source to fleecing node
+ log(vm.qmp("blockdev-backup",
+ device=src_node,
+ target=tgt_node,
+ sync="none"))
+
+ log('')
+ log('--- Setting up NBD Export ---')
+ log('')
+
+ nbd_uri = 'nbd+unix:///%s?socket=%s' % (tgt_node, nbd_sock_path)
+ log(vm.qmp("nbd-server-start",
+ **{"addr": { "type": "unix",
+ "data": { "path": nbd_sock_path } } }))
+
+ log(vm.qmp("nbd-server-add", device=tgt_node))
+
+ log('')
+ log('--- Sanity Check ---')
+ log('')
+
+ for p in (patterns + zeroes):
+ cmd = "read -P%s %s %s" % p
+ log(cmd)
+ assert qemu_io_silent('-r', '-f', 'raw', '-c', cmd, nbd_uri) == 0
+
+ log('')
+ log('--- Testing COW ---')
+ log('')
+
+ for p in overwrite:
+ cmd = "write -P%s %s %s" % p
+ log(cmd)
+ log(vm.hmp_qemu_io(src_node, cmd))
+
+ log('')
+ log('--- Verifying Data ---')
+ log('')
+
+ for p in (patterns + zeroes):
+ cmd = "read -P%s %s %s" % p
+ log(cmd)
+ assert qemu_io_silent('-r', '-f', 'raw', '-c', cmd, nbd_uri) == 0
+
+ log('')
+ log('--- Cleanup ---')
+ log('')
+
+ log(vm.qmp('block-job-cancel', device=src_node))
+ log(vm.event_wait('BLOCK_JOB_CANCELLED'),
+ filters=[iotests.filter_qmp_event])
+ log(vm.qmp('nbd-server-stop'))
+ log(vm.qmp('blockdev-del', node_name=tgt_node))
+ vm.shutdown()
+
+ log('')
+ log('--- Confirming writes ---')
+ log('')
+
+ for p in (overwrite + remainder):
+ cmd = "read -P%s %s %s" % p
+ log(cmd)
+ assert qemu_io_silent(base_img_path, '-c', cmd) == 0
+
+ log('')
+ log('Done')
diff --git a/tests/qemu-iotests/222.out b/tests/qemu-iotests/222.out
new file mode 100644
index 0000000..48f336a
--- /dev/null
+++ b/tests/qemu-iotests/222.out
@@ -0,0 +1,67 @@
+--- Setting up images ---
+
+Done
+
+--- Launching VM ---
+
+Done
+
+--- Setting up Fleecing Graph ---
+
+{u'return': {}}
+{u'return': {}}
+
+--- Setting up NBD Export ---
+
+{u'return': {}}
+{u'return': {}}
+
+--- Sanity Check ---
+
+read -P0x5d 0 64k
+read -P0xd5 1M 64k
+read -P0xdc 32M 64k
+read -P0xcd 0x3ff0000 64k
+read -P0 0x00f8000 32k
+read -P0 0x2010000 32k
+read -P0 0x3fe0000 64k
+
+--- Testing COW ---
+
+write -P0xab 0 64k
+{u'return': u''}
+write -P0xad 0x00f8000 64k
+{u'return': u''}
+write -P0x1d 0x2008000 64k
+{u'return': u''}
+write -P0xea 0x3fe0000 64k
+{u'return': u''}
+
+--- Verifying Data ---
+
+read -P0x5d 0 64k
+read -P0xd5 1M 64k
+read -P0xdc 32M 64k
+read -P0xcd 0x3ff0000 64k
+read -P0 0x00f8000 32k
+read -P0 0x2010000 32k
+read -P0 0x3fe0000 64k
+
+--- Cleanup ---
+
+{u'return': {}}
+{u'timestamp': {u'seconds': 'SECS', u'microseconds': 'USECS'}, u'data': {u'device': u'drive0', u'type': u'backup', u'speed': 0, u'len': 67108864, u'offset': 393216}, u'event': u'BLOCK_JOB_CANCELLED'}
+{u'return': {}}
+{u'return': {}}
+
+--- Confirming writes ---
+
+read -P0xab 0 64k
+read -P0xad 0x00f8000 64k
+read -P0x1d 0x2008000 64k
+read -P0xea 0x3fe0000 64k
+read -P0xd5 0x108000 32k
+read -P0xdc 32M 32k
+read -P0xcd 0x3ff0000 64k
+
+Done
diff --git a/tests/qemu-iotests/223 b/tests/qemu-iotests/223
new file mode 100755
index 0000000..b63b7a4
--- /dev/null
+++ b/tests/qemu-iotests/223
@@ -0,0 +1,138 @@
+#!/bin/bash
+#
+# Test reading dirty bitmap over NBD
+#
+# Copyright (C) 2018 Red Hat, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+seq="$(basename $0)"
+echo "QA output created by $seq"
+
+here="$PWD"
+status=1 # failure is the default!
+
+_cleanup()
+{
+ _cleanup_test_img
+ _cleanup_qemu
+ rm -f "$TEST_DIR/nbd"
+}
+trap "_cleanup; exit \$status" 0 1 2 3 15
+
+# get standard environment, filters and checks
+. ./common.rc
+. ./common.filter
+. ./common.qemu
+
+_supported_fmt qcow2
+_supported_proto file # uses NBD as well
+_supported_os Linux
+
+function do_run_qemu()
+{
+ echo Testing: "$@"
+ $QEMU -nographic -qmp stdio -serial none "$@"
+ echo
+}
+
+function run_qemu()
+{
+ do_run_qemu "$@" 2>&1 | _filter_testdir | _filter_qmp \
+ | _filter_qemu | _filter_imgfmt \
+ | _filter_actual_image_size
+}
+
+echo
+echo "=== Create partially sparse image, then add dirty bitmap ==="
+echo
+
+_make_test_img 4M
+$QEMU_IO -c 'w -P 0x11 1M 2M' "$TEST_IMG" | _filter_qemu_io
+run_qemu <<EOF
+{ "execute": "qmp_capabilities" }
+{ "execute": "blockdev-add",
+ "arguments": {
+ "driver": "$IMGFMT",
+ "node-name": "n",
+ "file": {
+ "driver": "file",
+ "filename": "$TEST_IMG"
+ }
+ }
+}
+{ "execute": "block-dirty-bitmap-add",
+ "arguments": {
+ "node": "n",
+ "name": "b",
+ "persistent": true
+ }
+}
+{ "execute": "quit" }
+EOF
+
+echo
+echo "=== Write part of the file under active bitmap ==="
+echo
+
+$QEMU_IO -c 'w -P 0x22 2M 2M' "$TEST_IMG" | _filter_qemu_io
+
+echo
+echo "=== End dirty bitmap, and start serving image over NBD ==="
+echo
+
+_launch_qemu 2> >(_filter_nbd)
+
+silent=
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"qmp_capabilities"}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"blockdev-add",
+ "arguments":{"driver":"qcow2", "node-name":"n",
+ "file":{"driver":"file", "filename":"'"$TEST_IMG"'"}}}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"x-block-dirty-bitmap-disable",
+ "arguments":{"node":"n", "name":"b"}}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"nbd-server-start",
+ "arguments":{"addr":{"type":"unix",
+ "data":{"path":"'"$TEST_DIR/nbd"'"}}}}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"nbd-server-add",
+ "arguments":{"device":"n"}}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"x-nbd-server-add-bitmap",
+ "arguments":{"name":"n", "bitmap":"b"}}' "return"
+
+echo
+echo "=== Contrast normal status with dirty-bitmap status ==="
+echo
+
+QEMU_IO_OPTIONS=$QEMU_IO_OPTIONS_NO_FMT
+IMG="driver=nbd,export=n,server.type=unix,server.path=$TEST_DIR/nbd"
+$QEMU_IO -r -c 'r -P 0 0 1m' -c 'r -P 0x11 1m 1m' \
+ -c 'r -P 0x22 2m 2m' --image-opts "$IMG" | _filter_qemu_io
+$QEMU_IMG map --output=json --image-opts \
+ "$IMG" | _filter_qemu_img_map
+$QEMU_IMG map --output=json --image-opts \
+ "$IMG,x-dirty-bitmap=qemu:dirty-bitmap:b" | _filter_qemu_img_map
+
+echo
+echo "=== End NBD server ==="
+echo
+
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"nbd-server-remove",
+ "arguments":{"name":"n"}}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"nbd-server-stop"}' "return"
+_send_qemu_cmd $QEMU_HANDLE '{"execute":"quit"}' "return"
+
+# success, all done
+echo '*** done'
+rm -f $seq.full
+status=0
diff --git a/tests/qemu-iotests/223.out b/tests/qemu-iotests/223.out
new file mode 100644
index 0000000..33021c8
--- /dev/null
+++ b/tests/qemu-iotests/223.out
@@ -0,0 +1,49 @@
+QA output created by 223
+
+=== Create partially sparse image, then add dirty bitmap ===
+
+Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=4194304
+wrote 2097152/2097152 bytes at offset 1048576
+2 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+Testing:
+QMP_VERSION
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "SHUTDOWN", "data": {"guest": false}}
+
+
+=== Write part of the file under active bitmap ===
+
+wrote 2097152/2097152 bytes at offset 2097152
+2 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+
+=== End dirty bitmap, and start serving image over NBD ===
+
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+
+=== Contrast normal status with dirty-bitmap status ===
+
+read 1048576/1048576 bytes at offset 0
+1 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+read 1048576/1048576 bytes at offset 1048576
+1 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+read 2097152/2097152 bytes at offset 2097152
+2 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+[{ "start": 0, "length": 1048576, "depth": 0, "zero": true, "data": false},
+{ "start": 1048576, "length": 3145728, "depth": 0, "zero": false, "data": true}]
+[{ "start": 0, "length": 2097152, "depth": 0, "zero": false, "data": true},
+{ "start": 2097152, "length": 2097152, "depth": 0, "zero": false, "data": false}]
+
+=== End NBD server ===
+
+{"return": {}}
+{"return": {}}
+{"return": {}}
+*** done
diff --git a/tests/qemu-iotests/group b/tests/qemu-iotests/group
index eea7581..af309eb 100644
--- a/tests/qemu-iotests/group
+++ b/tests/qemu-iotests/group
@@ -220,3 +220,5 @@
218 rw auto quick
219 rw auto
221 rw auto quick
+222 rw auto quick
+223 rw auto quick
diff --git a/tests/test-cutils.c b/tests/test-cutils.c
index 64a489c..d85c3e0 100644
--- a/tests/test-cutils.c
+++ b/tests/test-cutils.c
@@ -26,8 +26,9 @@
*/
#include "qemu/osdep.h"
-
+#include "qemu/units.h"
#include "qemu/cutils.h"
+#include "qemu/units.h"
static void test_parse_uint_null(void)
{
@@ -2022,7 +2023,7 @@
/* default is M */
err = qemu_strtosz_MiB(none, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, M_BYTE);
+ g_assert_cmpint(res, ==, MiB);
g_assert(endptr == none + 1);
err = qemu_strtosz(b, &endptr, &res);
@@ -2032,32 +2033,32 @@
err = qemu_strtosz(k, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, K_BYTE);
+ g_assert_cmpint(res, ==, KiB);
g_assert(endptr == k + 2);
err = qemu_strtosz(m, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, M_BYTE);
+ g_assert_cmpint(res, ==, MiB);
g_assert(endptr == m + 2);
err = qemu_strtosz(g, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, G_BYTE);
+ g_assert_cmpint(res, ==, GiB);
g_assert(endptr == g + 2);
err = qemu_strtosz(t, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, T_BYTE);
+ g_assert_cmpint(res, ==, TiB);
g_assert(endptr == t + 2);
err = qemu_strtosz(p, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, P_BYTE);
+ g_assert_cmpint(res, ==, PiB);
g_assert(endptr == p + 2);
err = qemu_strtosz(e, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, E_BYTE);
+ g_assert_cmpint(res, ==, EiB);
g_assert(endptr == e + 2);
}
@@ -2070,7 +2071,7 @@
err = qemu_strtosz(str, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, 12.345 * M_BYTE);
+ g_assert_cmpint(res, ==, 12.345 * MiB);
g_assert(endptr == str + 7);
}
@@ -2106,7 +2107,7 @@
str = "123xxx";
err = qemu_strtosz_MiB(str, &endptr, &res);
- g_assert_cmpint(res, ==, 123 * M_BYTE);
+ g_assert_cmpint(res, ==, 123 * MiB);
g_assert(endptr == str + 3);
err = qemu_strtosz(str, NULL, &res);
diff --git a/tests/test-keyval.c b/tests/test-keyval.c
index 63cb146..09b0ae3 100644
--- a/tests/test-keyval.c
+++ b/tests/test-keyval.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qapi/qmp/qdict.h"
#include "qapi/qmp/qlist.h"
@@ -457,11 +458,11 @@
visit_type_size(v, "sz2", &sz, &error_abort);
g_assert_cmpuint(sz, ==, 1536);
visit_type_size(v, "sz3", &sz, &error_abort);
- g_assert_cmphex(sz, ==, 2 * M_BYTE);
+ g_assert_cmphex(sz, ==, 2 * MiB);
visit_type_size(v, "sz4", &sz, &error_abort);
- g_assert_cmphex(sz, ==, G_BYTE / 10);
+ g_assert_cmphex(sz, ==, GiB / 10);
visit_type_size(v, "sz5", &sz, &error_abort);
- g_assert_cmphex(sz, ==, 16777215 * T_BYTE);
+ g_assert_cmphex(sz, ==, 16777215ULL * TiB);
visit_check_struct(v, &error_abort);
visit_end_struct(v, NULL);
visit_free(v);
diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
index 7092e21..ef96e84 100644
--- a/tests/test-qemu-opts.c
+++ b/tests/test-qemu-opts.c
@@ -8,7 +8,7 @@
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qemu/option.h"
#include "qemu/option_int.h"
#include "qapi/error.h"
@@ -704,13 +704,12 @@
g_assert_cmpuint(opts_count(opts), ==, 3);
g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, 8);
g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 1536);
- g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * M_BYTE);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * MiB);
opts = qemu_opts_parse(&opts_list_02, "size1=0.1G,size2=16777215T",
false, &error_abort);
g_assert_cmpuint(opts_count(opts), ==, 2);
- g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, G_BYTE / 10);
- g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0),
- ==, 16777215 * T_BYTE);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, GiB / 10);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215ULL * TiB);
/* Beyond limit with suffix */
opts = qemu_opts_parse(&opts_list_02, "size1=16777216T",
diff --git a/vl.c b/vl.c
index 9442bee..16b913f 100644
--- a/vl.c
+++ b/vl.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-version.h"
#include "qemu/cutils.h"
@@ -2808,8 +2809,8 @@
if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) {
uint64_t overflow_check = sz;
- sz <<= 20;
- if ((sz >> 20) != overflow_check) {
+ sz *= MiB;
+ if (sz / MiB != overflow_check) {
error_report("too large 'size' option value");
exit(EXIT_FAILURE);
}
