tree 0e3e3631e64dda3544870df1935c288ed88cf599
parent 0631aaae31cccf5ae61e8c67c198e064bfaafc66
author Wilfred Mallawa <wilfred.mallawa@wdc.com> 1645166319 +1000
committer Alistair Francis <alistair.francis@wdc.com> 1646277290 +1000

hw: riscv: opentitan: fixup SPI addresses

This patch updates the SPI_DEVICE, SPI_HOST0, SPI_HOST1
base addresses. Also adds these as unimplemented devices.

The address references can be found [1].

[1] https://github.com/lowRISC/opentitan/blob/6c317992fbd646818b34f2a2dbf44bc850e461e4/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h#L107

Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20220218063839.405082-1-alistair.francis@opensource.wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>