Spelling fixes, by Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3066 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/block-raw.c b/block-raw.c
index 29882e1..e9e5027 100644
--- a/block-raw.c
+++ b/block-raw.c
@@ -1295,7 +1295,7 @@
 
 #if 0
 /***********************************************/
-/* removable device additionnal commands */
+/* removable device additional commands */
 
 static int raw_is_inserted(BlockDriverState *bs)
 {
diff --git a/dis-asm.h b/dis-asm.h
index 2b2f1d1..ad08cc5 100644
--- a/dis-asm.h
+++ b/dis-asm.h
@@ -421,7 +421,7 @@
 /* Call this macro to initialize only the internal variables for the
    disassembler.  Architecture dependent things such as byte order, or machine
    variant are not touched by this macro.  This makes things much easier for
-   GDB which must initialize these things seperatly.  */
+   GDB which must initialize these things separately.  */
 
 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
   (INFO).fprintf_func = (FPRINTF_FUNC), \
diff --git a/gdbstub.c b/gdbstub.c
index 06cf302..2ac8c57 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -1248,12 +1248,12 @@
     return 0;
 }
 #else
-static int gdb_chr_can_recieve(void *opaque)
+static int gdb_chr_can_receive(void *opaque)
 {
   return 1;
 }
 
-static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
+static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
 {
     GDBState *s = opaque;
     int i;
@@ -1304,7 +1304,7 @@
     }
     s->env = first_cpu; /* XXX: allow to change CPU */
     s->chr = chr;
-    qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
+    qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
                           gdb_chr_event, s);
     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
     return 0;
diff --git a/hw/i2c.h b/hw/i2c.h
index 17e52e7..9330ae8 100644
--- a/hw/i2c.h
+++ b/hw/i2c.h
@@ -10,7 +10,7 @@
     I2C_START_RECV,
     I2C_START_SEND,
     I2C_FINISH,
-    I2C_NACK /* Masker NACKed a recieve byte.  */
+    I2C_NACK /* Masker NACKed a receive byte.  */
 };
 
 typedef struct i2c_slave i2c_slave;
diff --git a/hw/ide.c b/hw/ide.c
index c4fabe6..9acb02a 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -1567,7 +1567,7 @@
         buf[1] = 0x80; /* removable */
         buf[2] = 0x00; /* ISO */
         buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
-        buf[4] = 31; /* additionnal length */
+        buf[4] = 31; /* additional length */
         buf[5] = 0; /* reserved */
         buf[6] = 0; /* reserved */
         buf[7] = 0; /* reserved */
diff --git a/hw/pl011.c b/hw/pl011.c
index 64b7530..149a85e 100644
--- a/hw/pl011.c
+++ b/hw/pl011.c
@@ -176,7 +176,7 @@
     }
 }
 
-static int pl011_can_recieve(void *opaque)
+static int pl011_can_receive(void *opaque)
 {
     pl011_state *s = (pl011_state *)opaque;
 
@@ -186,7 +186,7 @@
         return s->read_count < 1;
 }
 
-static void pl011_recieve(void *opaque, const uint8_t *buf, int size)
+static void pl011_receive(void *opaque, const uint8_t *buf, int size)
 {
     pl011_state *s = (pl011_state *)opaque;
     int slot;
@@ -241,7 +241,7 @@
     s->cr = 0x300;
     s->flags = 0x90;
     if (chr){ 
-        qemu_chr_add_handlers(chr, pl011_can_recieve, pl011_recieve,
+        qemu_chr_add_handlers(chr, pl011_can_receive, pl011_receive,
                               pl011_event, s);
     }
     /* ??? Save/restore.  */
diff --git a/hw/pl181.c b/hw/pl181.c
index 9124659..62ccad9 100644
--- a/hw/pl181.c
+++ b/hw/pl181.c
@@ -160,7 +160,7 @@
             s->response[2] = RWORD(8);
             s->response[3] = RWORD(12) & ~1;
         }
-        DPRINTF("Response recieved\n");
+        DPRINTF("Response received\n");
         s->status |= PL181_STATUS_CMDRESPEND;
 #undef RWORD
     } else {
@@ -174,7 +174,7 @@
     s->status |= PL181_STATUS_CMDTIMEOUT;
 }
 
-/* Transfer data between teh card and the FIFO.  This is complicated by
+/* Transfer data between the card and the FIFO.  This is complicated by
    the FIFO holding 32-bit words and the card taking data in single byte
    chunks.  FIFO bytes are transferred in little-endian order.  */
    
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index d1e60e8..705bddb 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -790,7 +790,7 @@
     RTL8139State *s = opaque;
     int avail;
 
-    /* Recieve (drop) packets if card is disabled.  */
+    /* Receive (drop) packets if card is disabled.  */
     if (!s->clock_enabled)
       return 1;
     if (!rtl8139_receiver_enabled(s))
diff --git a/hw/usb.c b/hw/usb.c
index efbc6db..17cb8df 100644
--- a/hw/usb.c
+++ b/hw/usb.c
@@ -140,7 +140,7 @@
                     s->setup_state = SETUP_STATE_IDLE;
                     /* transfer OK */
                 } else {
-                    /* ignore additionnal output */
+                    /* ignore additional output */
                 }
                 break;
             case SETUP_STATE_DATA:
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 5b1334a..6dcb9dc 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -244,7 +244,7 @@
 }
 
 /* XXX: we support only POSIX RT signals are used. */
-/* XXX: find a solution for 64 bit (additionnal malloced data is needed) */
+/* XXX: find a solution for 64 bit (additional malloced data is needed) */
 void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo)
 {
     info->si_signo = tswap32(tinfo->si_signo);
diff --git a/m68k-dis.c b/m68k-dis.c
index dd19558..ef0f89c 100644
--- a/m68k-dis.c
+++ b/m68k-dis.c
@@ -560,7 +560,7 @@
 };
 
 /* Name of register halves for MAC/EMAC.
-   Seperate from reg_names since 'spu', 'fpl' look weird.  */
+   Separate from reg_names since 'spu', 'fpl' look weird.  */
 static char *const reg_half_names[] =
 {
   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 3a82426..6d764f5 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -121,7 +121,7 @@
 #define VIP_MASK                0x00100000
 #define ID_MASK                 0x00200000
 
-/* hidden flags - used internally by qemu to represent additionnal cpu
+/* hidden flags - used internally by qemu to represent additional cpu
    states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid
    using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
    with eflags. */