Sign in
qemu
/
qemu
/
a9c72efd6d6d62ac84ae57ca55606747e04e8ba7
/
.
/
tcg
/
arm
/
tcg-target-reg-bits.h
blob: 23b7730a8d4397948093989cbac8740f6257d0bc [
file
] [
log
] [
blame
]
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2023 Linaro
*/
#ifndef
TCG_TARGET_REG_BITS_H
#define
TCG_TARGET_REG_BITS_H
#define
TCG_TARGET_REG_BITS
32
#endif