tree ef0217ce020d6716d92d5f10305c6a889c4bf71e
parent 9220b09d3b1294967be67b1baeeb928187245594
author Peter Maydell <peter.maydell@linaro.org> 1707226168 +0000
committer Peter Maydell <peter.maydell@linaro.org> 1708007559 +0000

hw/arm/mps3r: Add UARTs

This board has a lot of UARTs: there is one UART per CPU in the
per-CPU peripheral part of the address map, whose interrupts are
connected as per-CPU interrupt lines.  Then there are 4 UARTs in the
normal part of the peripheral space, whose interrupts are shared
peripheral interrupts.

Connect and wire them all up; this involves some OR gates where
multiple overflow interrupts are wired into one GIC input.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240206132931.38376-11-peter.maydell@linaro.org