commit | e99fd8af63a1692a1159cba8fa4943f2589adf97 | [log] [tgz] |
---|---|---|
author | Scott Wood <scottwood@freescale.com> | Fri Dec 21 16:15:39 2012 +0000 |
committer | Alexander Graf <agraf@suse.de> | Mon Jan 07 17:37:09 2013 +0100 |
tree | fc761e23735e982c7c6062355e188f395f8dd8b2 | |
parent | 4c4f0e4801ac79632d03867c88aafc90b4ce503c [diff] |
openpic: lower interrupt when reading the MSI register This will stop things from breaking once it's properly treated as a level-triggered interrupt. Note that it's the MPIC's MSI cascade interrupts that are level-triggered; the individual MSIs are edge-triggered. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>