commit | a17a61f306c12690d541515798b2d227049aa35b | [log] [tgz] |
---|---|---|
author | Palmer Dabbelt <palmer@sifive.com> | Mon Oct 29 09:06:44 2018 -0700 |
committer | Palmer Dabbelt <palmer@sifive.com> | Tue Oct 30 11:04:29 2018 -0700 |
tree | 63edec7bbdc958f5b622fbc8257af55713d25ca9 | |
parent | 4a9b31b82bcd2cafe85137334f1c07afe56cc224 [diff] |
Add Alistair as a RISC-V Maintainer Alistair has been contributing to the RISC-V QEMU port for a while now so I'd like him to be officially listed as a maintainer. I've checked with the other RISC-V maintainers and there are no objections, and I've also checked with Alistair so he knows I'm volunteering him. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>