commit a1559537d183bf1f4e2cfef972610c8c9e1a6aa5
author Taylor Simpson <tsimpson@quicinc.com> Wed Mar 17 11:48:57 2021 -0500
committer Taylor Simpson <tsimpson@quicinc.com> Wed Nov 03 16:01:26 2021 -0500
tree 9e4f7493e67621802ca4d0d1395f4ce7010f9ac5
parent 375bcf389f1e5f8c3bde70b3f8c847fdd73074c0

Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core

HVX is a set of wide vector instructions.  Machine state includes
    vector registers (VRegs)
    vector predicate registers (QRegs)
    temporary registers for intermediate values
    store buffer (masked stores and scatter/gather)

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>

target/hexagon/insn.h

diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index 2e34591..aa26389 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -67,6 +67,9 @@
     bool pkt_has_store_s0;
     bool pkt_has_store_s1;
 
+    bool pkt_has_hvx;
+    Insn *vhist_insn;
+
     Insn insn[INSTRUCTIONS_MAX];
 };