)]}'
{
  "commit": "9cdfd1b9f7eb5ecd1267bbd68330a11dcb8aa8f2",
  "tree": "5f720d103c85d07705f476ed5be333da9853134b",
  "parents": [
    "3401ea3cfe06ab5ab059ae19b662270e1357545e"
  ],
  "author": {
    "name": "Nicholas Piggin",
    "email": "npiggin@gmail.com",
    "time": "Wed Jul 05 22:06:29 2023 +1000"
  },
  "committer": {
    "name": "Daniel Henrique Barboza",
    "email": "danielhb413@gmail.com",
    "time": "Fri Jul 07 04:47:49 2023 -0300"
  },
  "message": "target/ppc: SMT support for the HID SPR\n\nHID is a per-core shared register, skiboot sets this (e.g., setting\nHILE) on one thread and that must affect all threads of the core.\n\nReviewed-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nTested-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nSigned-off-by: Nicholas Piggin \u003cnpiggin@gmail.com\u003e\nMessage-ID: \u003c20230705120631.27670-3-npiggin@gmail.com\u003e\nSigned-off-by: Daniel Henrique Barboza \u003cdanielhb413@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "target/ppc/cpu_init.c",
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      "new_mode": 33188,
      "new_path": "target/ppc/cpu_init.c"
    },
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    },
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      "new_path": "target/ppc/spr_common.h"
    },
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      "type": "modify",
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      "old_mode": 33188,
      "old_path": "target/ppc/translate.c",
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      "new_mode": 33188,
      "new_path": "target/ppc/translate.c"
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}