Merge tag 'pull-target-arm-20240430' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/core/clock: allow clock_propagate on child clocks
* hvf: arm: Remove unused PL1_WRITE_MASK define
* target/arm: Restrict translation disabled alignment check to VMSA
* docs/system/arm/emulation.rst: Add missing implemented features
* target/arm: Enable FEAT_CSV2_3, FEAT_ETS2, FEAT_Spec_FPACC for 'max'
* tests/avocado: update sunxi kernel from armbian to 6.6.16
* target/arm: Make new CPUs default to 1GHz generic timer
* hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields
* hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size
* hw/arm/npcm7xx: Store derivative OTP fuse key in little endian
* hw/arm: Add DM163 display to B-L475E-IOT01A board
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# 3v0Ni/nntc6QtZDB88OIzA==
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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 30 Apr 2024 09:47:51 AM PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
* tag 'pull-target-arm-20240430' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits)
tests/qtest : Add testcase for DM163
hw/arm : Connect DM163 to B-L475E-IOT01A
hw/arm : Create Bl475eMachineState
hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC
hw/display : Add device DM163
hw/arm/npcm7xx: Store derivative OTP fuse key in little endian
hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size
hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields
target/arm: Default to 1GHz cntfrq for 'max' and new CPUs
hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property
hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz
target/arm: Refactor default generic timer frequency handling
tests/avocado: update sunxi kernel from armbian to 6.6.16
target/arm: Enable FEAT_Spec_FPACC for -cpu max
target/arm: Implement ID_AA64MMFR3_EL1
target/arm: Enable FEAT_ETS2 for -cpu max
target/arm: Enable FEAT_CSV2_3 for -cpu max
docs/system/arm/emulation.rst: Add missing implemented features
target/arm: Restrict translation disabled alignment check to VMSA
hvf: arm: Remove PL1_WRITE_MASK
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/.gitlab-ci.d/cirrus.yml b/.gitlab-ci.d/cirrus.yml
index 4671f06..75df127 100644
--- a/.gitlab-ci.d/cirrus.yml
+++ b/.gitlab-ci.d/cirrus.yml
@@ -57,6 +57,7 @@
CIRRUS_VM_RAM: 8G
UPDATE_COMMAND: pkg update; pkg upgrade -y
INSTALL_COMMAND: pkg install -y
+ CONFIGURE_ARGS: --target-list-exclude=arm-softmmu,i386-softmmu,microblaze-softmmu,mips64el-softmmu,mipsel-softmmu,mips-softmmu,ppc-softmmu,sh4eb-softmmu,xtensa-softmmu
TEST_TARGETS: check
aarch64-macos-13-base-build:
@@ -72,6 +73,7 @@
INSTALL_COMMAND: brew install
PATH_EXTRA: /opt/homebrew/ccache/libexec:/opt/homebrew/gettext/bin
PKG_CONFIG_PATH: /opt/homebrew/curl/lib/pkgconfig:/opt/homebrew/ncurses/lib/pkgconfig:/opt/homebrew/readline/lib/pkgconfig
+ CONFIGURE_ARGS: --target-list-exclude=arm-softmmu,i386-softmmu,microblazeel-softmmu,mips64-softmmu,mipsel-softmmu,mips-softmmu,ppc-softmmu,sh4-softmmu,xtensaeb-softmmu
TEST_TARGETS: check-unit check-block check-qapi-schema check-softfloat check-qtest-x86_64
aarch64-macos-14-base-build:
@@ -89,40 +91,3 @@
PKG_CONFIG_PATH: /opt/homebrew/curl/lib/pkgconfig:/opt/homebrew/ncurses/lib/pkgconfig:/opt/homebrew/readline/lib/pkgconfig
TEST_TARGETS: check-unit check-block check-qapi-schema check-softfloat check-qtest-x86_64
QEMU_JOB_OPTIONAL: 1
-
-
-# The following jobs run VM-based tests via KVM on a Linux-based Cirrus-CI job
-.cirrus_kvm_job:
- extends: .base_job_template
- stage: build
- image: registry.gitlab.com/libvirt/libvirt-ci/cirrus-run:master
- needs: []
- timeout: 80m
- script:
- - sed -e "s|[@]CI_REPOSITORY_URL@|$CI_REPOSITORY_URL|g"
- -e "s|[@]CI_COMMIT_REF_NAME@|$CI_COMMIT_REF_NAME|g"
- -e "s|[@]CI_COMMIT_SHA@|$CI_COMMIT_SHA|g"
- -e "s|[@]NAME@|$NAME|g"
- -e "s|[@]CONFIGURE_ARGS@|$CONFIGURE_ARGS|g"
- -e "s|[@]TEST_TARGETS@|$TEST_TARGETS|g"
- <.gitlab-ci.d/cirrus/kvm-build.yml >.gitlab-ci.d/cirrus/$NAME.yml
- - cat .gitlab-ci.d/cirrus/$NAME.yml
- - cirrus-run -v --show-build-log always .gitlab-ci.d/cirrus/$NAME.yml
- variables:
- QEMU_JOB_CIRRUS: 1
- QEMU_JOB_OPTIONAL: 1
-
-
-x86-netbsd:
- extends: .cirrus_kvm_job
- variables:
- NAME: netbsd
- CONFIGURE_ARGS: --target-list=x86_64-softmmu,ppc64-softmmu,aarch64-softmmu
- TEST_TARGETS: check
-
-x86-openbsd:
- extends: .cirrus_kvm_job
- variables:
- NAME: openbsd
- CONFIGURE_ARGS: --target-list=i386-softmmu,riscv64-softmmu,mips64-softmmu
- TEST_TARGETS: check
diff --git a/.gitlab-ci.d/cirrus/kvm-build.yml b/.gitlab-ci.d/cirrus/kvm-build.yml
deleted file mode 100644
index a93881a..0000000
--- a/.gitlab-ci.d/cirrus/kvm-build.yml
+++ /dev/null
@@ -1,31 +0,0 @@
-container:
- image: fedora:35
- cpu: 4
- memory: 8Gb
- kvm: true
-
-env:
- CIRRUS_CLONE_DEPTH: 1
- CI_REPOSITORY_URL: "@CI_REPOSITORY_URL@"
- CI_COMMIT_REF_NAME: "@CI_COMMIT_REF_NAME@"
- CI_COMMIT_SHA: "@CI_COMMIT_SHA@"
-
-@NAME@_task:
- @NAME@_vm_cache:
- folder: $HOME/.cache/qemu-vm
- install_script:
- - dnf update -y
- - dnf install -y git make openssh-clients qemu-img qemu-system-x86 wget meson
- clone_script:
- - git clone --depth 100 "$CI_REPOSITORY_URL" .
- - git fetch origin "$CI_COMMIT_REF_NAME"
- - git reset --hard "$CI_COMMIT_SHA"
- build_script:
- - if [ -f $HOME/.cache/qemu-vm/images/@NAME@.img ]; then
- make vm-build-@NAME@ J=$(getconf _NPROCESSORS_ONLN)
- EXTRA_CONFIGURE_OPTS="@CONFIGURE_ARGS@"
- BUILD_TARGET="@TEST_TARGETS@" ;
- else
- make vm-build-@NAME@ J=$(getconf _NPROCESSORS_ONLN) BUILD_TARGET=help
- EXTRA_CONFIGURE_OPTS="--disable-system --disable-user --disable-tools" ;
- fi
diff --git a/.gitlab-ci.d/custom-runners.yml b/.gitlab-ci.d/custom-runners.yml
index a0e79ac..29e52df 100644
--- a/.gitlab-ci.d/custom-runners.yml
+++ b/.gitlab-ci.d/custom-runners.yml
@@ -29,7 +29,7 @@
junit: build/meson-logs/testlog.junit.xml
include:
- - local: '/.gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml'
+ - local: '/.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml'
- local: '/.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch64.yml'
- local: '/.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch32.yml'
- local: '/.gitlab-ci.d/custom-runners/centos-stream-8-x86_64.yml'
diff --git a/.gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml b/.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml
similarity index 80%
rename from .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml
rename to .gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml
index cdae6c5..1059818 100644
--- a/.gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml
+++ b/.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml
@@ -1,34 +1,32 @@
-# All ubuntu-20.04 jobs should run successfully in an environment
+# All ubuntu-22.04 jobs should run successfully in an environment
# setup by the scripts/ci/setup/build-environment.yml task
-# "Install basic packages to build QEMU on Ubuntu 20.04/20.04"
+# "Install basic packages to build QEMU on Ubuntu 22.04"
-ubuntu-20.04-s390x-all-linux-static:
+ubuntu-22.04-s390x-all-linux-static:
extends: .custom_runner_template
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
rules:
- if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
- if: "$S390X_RUNNER_AVAILABLE"
script:
- # --disable-libssh is needed because of https://bugs.launchpad.net/qemu/+bug/1838763
- # --disable-glusterfs is needed because there's no static version of those libs in distro supplied packages
- mkdir build
- cd build
- - ../configure --enable-debug --static --disable-system --disable-glusterfs --disable-libssh
+ - ../configure --enable-debug --static --disable-system
|| { cat config.log meson-logs/meson-log.txt; exit 1; }
- make --output-sync -j`nproc`
- make --output-sync check-tcg
- make --output-sync -j`nproc` check
-ubuntu-20.04-s390x-all:
+ubuntu-22.04-s390x-all:
extends: .custom_runner_template
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
timeout: 75m
rules:
@@ -42,12 +40,12 @@
- make --output-sync -j`nproc`
- make --output-sync -j`nproc` check
-ubuntu-20.04-s390x-alldbg:
+ubuntu-22.04-s390x-alldbg:
extends: .custom_runner_template
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
rules:
- if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
@@ -65,12 +63,12 @@
- make --output-sync -j`nproc`
- make --output-sync -j`nproc` check
-ubuntu-20.04-s390x-clang:
+ubuntu-22.04-s390x-clang:
extends: .custom_runner_template
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
rules:
- if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
@@ -87,11 +85,11 @@
- make --output-sync -j`nproc`
- make --output-sync -j`nproc` check
-ubuntu-20.04-s390x-tci:
+ubuntu-22.04-s390x-tci:
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
rules:
- if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
@@ -107,12 +105,12 @@
|| { cat config.log meson-logs/meson-log.txt; exit 1; }
- make --output-sync -j`nproc`
-ubuntu-20.04-s390x-notcg:
+ubuntu-22.04-s390x-notcg:
extends: .custom_runner_template
needs: []
stage: build
tags:
- - ubuntu_20.04
+ - ubuntu_22.04
- s390x
rules:
- if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index a514bbb..940104e 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -23,6 +23,7 @@
#include "qemu/osdep.h"
#include "sysemu/cryptodev.h"
+#include "qemu/error-report.h"
#include "qapi/error.h"
#include "standard-headers/linux/virtio_crypto.h"
#include "crypto/cipher.h"
@@ -396,8 +397,8 @@
case VIRTIO_CRYPTO_HASH_CREATE_SESSION:
case VIRTIO_CRYPTO_MAC_CREATE_SESSION:
default:
- error_setg(&local_error, "Unsupported opcode :%" PRIu32 "",
- sess_info->op_code);
+ error_report("Unsupported opcode :%" PRIu32 "",
+ sess_info->op_code);
return -VIRTIO_CRYPTO_NOTSUPP;
}
@@ -554,8 +555,8 @@
if (op_info->session_id >= MAX_NUM_SESSIONS ||
builtin->sessions[op_info->session_id] == NULL) {
- error_setg(&local_error, "Cannot find a valid session id: %" PRIu64 "",
- op_info->session_id);
+ error_report("Cannot find a valid session id: %" PRIu64 "",
+ op_info->session_id);
return -VIRTIO_CRYPTO_INVSESS;
}
diff --git a/hw/ide/core.c b/hw/ide/core.c
index e8cb2da..08d9218 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -1623,11 +1623,24 @@
/* Refuse if no sectors are addressable (e.g. medium not inserted) */
if (s->nb_sectors == 0) {
ide_abort_command(s);
- return true;
- }
+ } else {
+ /*
+ * Save the active drive parameters, which may have been
+ * limited from their native counterparts by, e.g., INITIALIZE
+ * DEVICE PARAMETERS or SET MAX ADDRESS.
+ */
+ const int aheads = s->heads;
+ const int asectors = s->sectors;
- ide_cmd_lba48_transform(s, lba48);
- ide_set_sector(s, s->nb_sectors - 1);
+ s->heads = s->drive_heads;
+ s->sectors = s->drive_sectors;
+
+ ide_cmd_lba48_transform(s, lba48);
+ ide_set_sector(s, s->nb_sectors - 1);
+
+ s->heads = aheads;
+ s->sectors = asectors;
+ }
return true;
}
diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
new file mode 100644
index 0000000..7d1630b
--- /dev/null
+++ b/hw/loongarch/boot.c
@@ -0,0 +1,336 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch boot helper functions.
+ *
+ * Copyright (c) 2023 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "target/loongarch/cpu.h"
+#include "hw/loongarch/virt.h"
+#include "hw/loader.h"
+#include "elf.h"
+#include "qemu/error-report.h"
+#include "sysemu/reset.h"
+#include "sysemu/qtest.h"
+
+ram_addr_t initrd_offset;
+uint64_t initrd_size;
+
+static const unsigned int slave_boot_code[] = {
+ /* Configure reset ebase. */
+ 0x0400302c, /* csrwr $t0, LOONGARCH_CSR_EENTRY */
+
+ /* Disable interrupt. */
+ 0x0380100c, /* ori $t0, $zero,0x4 */
+ 0x04000180, /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */
+
+ /* Clear mailbox. */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
+ 0x06481da0, /* iocsrwr.d $zero, $t1 */
+
+ /* Enable IPI interrupt. */
+ 0x1400002c, /* lu12i.w $t0, 1(0x1) */
+ 0x0400118c, /* csrxchg $t0, $t0, LOONGARCH_CSR_ECFG */
+ 0x02fffc0c, /* addi.d $t0, $r0,-1(0xfff) */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x038011ad, /* ori $t1, $t1, CORE_EN_OFF */
+ 0x064819ac, /* iocsrwr.w $t0, $t1 */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
+
+ /* Wait for wakeup <.L11>: */
+ 0x06488000, /* idle 0x0 */
+ 0x03400000, /* andi $zero, $zero, 0x0 */
+ 0x064809ac, /* iocsrrd.w $t0, $t1 */
+ 0x43fff59f, /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */
+
+ /* Read and clear IPI interrupt. */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x064809ac, /* iocsrrd.w $t0, $t1 */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x038031ad, /* ori $t1, $t1, CORE_CLEAR_OFF */
+ 0x064819ac, /* iocsrwr.w $t0, $t1 */
+
+ /* Disable IPI interrupt. */
+ 0x1400002c, /* lu12i.w $t0, 1(0x1) */
+ 0x04001180, /* csrxchg $zero, $t0, LOONGARCH_CSR_ECFG */
+
+ /* Read mail buf and jump to specified entry */
+ 0x1400002d, /* lu12i.w $t1, 1(0x1) */
+ 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
+ 0x06480dac, /* iocsrrd.d $t0, $t1 */
+ 0x00150181, /* move $ra, $t0 */
+ 0x4c000020, /* jirl $zero, $ra,0 */
+};
+
+static inline void *guidcpy(void *dst, const void *src)
+{
+ return memcpy(dst, src, sizeof(efi_guid_t));
+}
+
+static void init_efi_boot_memmap(struct efi_system_table *systab,
+ void *p, void *start)
+{
+ unsigned i;
+ struct efi_boot_memmap *boot_memmap = p;
+ efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID;
+
+ /* efi_configuration_table 1 */
+ guidcpy(&systab->tables[0].guid, &tbl_guid);
+ systab->tables[0].table = (struct efi_configuration_table *)(p - start);
+ systab->nr_tables = 1;
+
+ boot_memmap->desc_size = sizeof(efi_memory_desc_t);
+ boot_memmap->desc_ver = 1;
+ boot_memmap->map_size = 0;
+
+ efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap);
+ for (i = 0; i < memmap_entries; i++) {
+ map = (void *)boot_memmap + sizeof(*map);
+ map[i].type = memmap_table[i].type;
+ map[i].phys_addr = ROUND_UP(memmap_table[i].address, 64 * KiB);
+ map[i].num_pages = ROUND_DOWN(memmap_table[i].address +
+ memmap_table[i].length - map[i].phys_addr, 64 * KiB);
+ p += sizeof(efi_memory_desc_t);
+ }
+}
+
+static void init_efi_initrd_table(struct efi_system_table *systab,
+ void *p, void *start)
+{
+ efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID;
+ struct efi_initrd *initrd_table = p;
+
+ /* efi_configuration_table 2 */
+ guidcpy(&systab->tables[1].guid, &tbl_guid);
+ systab->tables[1].table = (struct efi_configuration_table *)(p - start);
+ systab->nr_tables = 2;
+
+ initrd_table->base = initrd_offset;
+ initrd_table->size = initrd_size;
+}
+
+static void init_efi_fdt_table(struct efi_system_table *systab)
+{
+ efi_guid_t tbl_guid = DEVICE_TREE_GUID;
+
+ /* efi_configuration_table 3 */
+ guidcpy(&systab->tables[2].guid, &tbl_guid);
+ systab->tables[2].table = (void *)FDT_BASE;
+ systab->nr_tables = 3;
+}
+
+static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
+{
+ void *bp_tables_start;
+ struct efi_system_table *systab = p;
+
+ info->a2 = p - start;
+
+ systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
+ systab->hdr.revision = EFI_SPECIFICATION_VERSION;
+ systab->hdr.revision = sizeof(struct efi_system_table),
+ systab->fw_revision = FW_VERSION << 16 | FW_PATCHLEVEL << 8;
+ systab->runtime = 0;
+ systab->boottime = 0;
+ systab->nr_tables = 0;
+
+ p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB);
+
+ systab->tables = p;
+ bp_tables_start = p;
+
+ init_efi_boot_memmap(systab, p, start);
+ p += ROUND_UP(sizeof(struct efi_boot_memmap) +
+ sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
+ init_efi_initrd_table(systab, p, start);
+ p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
+ init_efi_fdt_table(systab);
+
+ systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
+}
+
+static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
+{
+ hwaddr cmdline_addr = p - start;
+
+ info->a0 = 1;
+ info->a1 = cmdline_addr;
+
+ memcpy(p, info->kernel_cmdline, COMMAND_LINE_SIZE);
+}
+
+static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
+{
+ return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
+}
+
+static int64_t load_kernel_info(struct loongarch_boot_info *info)
+{
+ uint64_t kernel_entry, kernel_low, kernel_high;
+ ssize_t kernel_size;
+
+ kernel_size = load_elf(info->kernel_filename, NULL,
+ cpu_loongarch_virt_to_phys, NULL,
+ &kernel_entry, &kernel_low,
+ &kernel_high, NULL, 0,
+ EM_LOONGARCH, 1, 0);
+
+ if (kernel_size < 0) {
+ error_report("could not load kernel '%s': %s",
+ info->kernel_filename,
+ load_elf_strerror(kernel_size));
+ exit(1);
+ }
+
+ if (info->initrd_filename) {
+ initrd_size = get_image_size(info->initrd_filename);
+ if (initrd_size > 0) {
+ initrd_offset = ROUND_UP(kernel_high + 4 * kernel_size, 64 * KiB);
+
+ if (initrd_offset + initrd_size > info->ram_size) {
+ error_report("memory too small for initial ram disk '%s'",
+ info->initrd_filename);
+ exit(1);
+ }
+
+ initrd_size = load_image_targphys(info->initrd_filename, initrd_offset,
+ info->ram_size - initrd_offset);
+ }
+
+ if (initrd_size == (target_ulong)-1) {
+ error_report("could not load initial ram disk '%s'",
+ info->initrd_filename);
+ exit(1);
+ }
+ } else {
+ initrd_size = 0;
+ }
+
+ return kernel_entry;
+}
+
+static void reset_load_elf(void *opaque)
+{
+ LoongArchCPU *cpu = opaque;
+ CPULoongArchState *env = &cpu->env;
+
+ cpu_reset(CPU(cpu));
+ if (env->load_elf) {
+ if (cpu == LOONGARCH_CPU(first_cpu)) {
+ env->gpr[4] = env->boot_info->a0;
+ env->gpr[5] = env->boot_info->a1;
+ env->gpr[6] = env->boot_info->a2;
+ }
+ cpu_set_pc(CPU(cpu), env->elf_address);
+ }
+}
+
+static void fw_cfg_add_kernel_info(struct loongarch_boot_info *info,
+ FWCfgState *fw_cfg)
+{
+ /*
+ * Expose the kernel, the command line, and the initrd in fw_cfg.
+ * We don't process them here at all, it's all left to the
+ * firmware.
+ */
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
+ info->kernel_filename,
+ false);
+
+ if (info->initrd_filename) {
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
+ info->initrd_filename, false);
+ }
+
+ if (info->kernel_cmdline) {
+ fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
+ strlen(info->kernel_cmdline) + 1);
+ fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
+ info->kernel_cmdline);
+ }
+}
+
+static void loongarch_firmware_boot(LoongArchMachineState *lams,
+ struct loongarch_boot_info *info)
+{
+ fw_cfg_add_kernel_info(info, lams->fw_cfg);
+}
+
+static void init_boot_rom(struct loongarch_boot_info *info, void *p)
+{
+ void *start = p;
+
+ init_cmdline(info, p, start);
+ p += COMMAND_LINE_SIZE;
+
+ init_systab(info, p, start);
+}
+
+static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+{
+ void *p, *bp;
+ int64_t kernel_addr = 0;
+ LoongArchCPU *lacpu;
+ CPUState *cs;
+
+ if (info->kernel_filename) {
+ kernel_addr = load_kernel_info(info);
+ } else {
+ if(!qtest_enabled()) {
+ error_report("Need kernel filename\n");
+ exit(1);
+ }
+ }
+
+ /* Load cmdline and system tables at [0 - 1 MiB] */
+ p = g_malloc0(1 * MiB);
+ bp = p;
+ init_boot_rom(info, p);
+ rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory);
+
+ /* Load slave boot code at pflash0 . */
+ void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
+ memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
+ rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
+
+ CPU_FOREACH(cs) {
+ lacpu = LOONGARCH_CPU(cs);
+ lacpu->env.load_elf = true;
+ if (cs == first_cpu) {
+ lacpu->env.elf_address = kernel_addr;
+ } else {
+ lacpu->env.elf_address = VIRT_FLASH0_BASE;
+ }
+ lacpu->env.boot_info = info;
+ }
+
+ g_free(boot_code);
+ g_free(bp);
+}
+
+void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
+{
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(ms);
+ int i;
+
+ /* register reset function */
+ for (i = 0; i < ms->smp.cpus; i++) {
+ qemu_register_reset(reset_load_elf, LOONGARCH_CPU(qemu_get_cpu(i)));
+ }
+
+ info->kernel_filename = ms->kernel_filename;
+ info->kernel_cmdline = ms->kernel_cmdline;
+ info->initrd_filename = ms->initrd_filename;
+
+ if (lams->bios_loaded) {
+ loongarch_firmware_boot(lams, info);
+ } else {
+ loongarch_direct_kernel_boot(info);
+ }
+}
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
index c042150..d306d82 100644
--- a/hw/loongarch/meson.build
+++ b/hw/loongarch/meson.build
@@ -1,6 +1,7 @@
loongarch_ss = ss.source_set()
loongarch_ss.add(files(
'fw_cfg.c',
+ 'boot.c',
))
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: [files('virt.c'), fdt])
loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 441d764..c099987 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -46,14 +46,6 @@
#include "hw/block/flash.h"
#include "qemu/error-report.h"
-
-struct loaderparams {
- uint64_t ram_size;
- const char *kernel_filename;
- const char *kernel_cmdline;
- const char *initrd_filename;
-};
-
static PFlashCFI01 *virt_flash_create1(LoongArchMachineState *lams,
const char *name,
const char *alias_prop_name)
@@ -114,6 +106,101 @@
virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
}
+static void fdt_add_cpuic_node(LoongArchMachineState *lams,
+ uint32_t *cpuintc_phandle)
+{
+ MachineState *ms = MACHINE(lams);
+ char *nodename;
+
+ *cpuintc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+ nodename = g_strdup_printf("/cpuic");
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "loongson,cpu-interrupt-controller");
+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
+ g_free(nodename);
+}
+
+static void fdt_add_eiointc_node(LoongArchMachineState *lams,
+ uint32_t *cpuintc_phandle,
+ uint32_t *eiointc_phandle)
+{
+ MachineState *ms = MACHINE(lams);
+ char *nodename;
+ hwaddr extioi_base = APIC_BASE;
+ hwaddr extioi_size = EXTIOI_SIZE;
+
+ *eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+ nodename = g_strdup_printf("/eiointc@%" PRIx64, extioi_base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "loongson,ls2k2000-eiointc");
+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+ *cpuintc_phandle);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3);
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0,
+ extioi_base, 0x0, extioi_size);
+ g_free(nodename);
+}
+
+static void fdt_add_pch_pic_node(LoongArchMachineState *lams,
+ uint32_t *eiointc_phandle,
+ uint32_t *pch_pic_phandle)
+{
+ MachineState *ms = MACHINE(lams);
+ char *nodename;
+ hwaddr pch_pic_base = VIRT_PCH_REG_BASE;
+ hwaddr pch_pic_size = VIRT_PCH_REG_SIZE;
+
+ *pch_pic_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+ nodename = g_strdup_printf("/platic@%" PRIx64, pch_pic_base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_pic_phandle);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "loongson,pch-pic-1.0");
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0,
+ pch_pic_base, 0, pch_pic_size);
+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 2);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+ *eiointc_phandle);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,pic-base-vec", 0);
+ g_free(nodename);
+}
+
+static void fdt_add_pch_msi_node(LoongArchMachineState *lams,
+ uint32_t *eiointc_phandle,
+ uint32_t *pch_msi_phandle)
+{
+ MachineState *ms = MACHINE(lams);
+ char *nodename;
+ hwaddr pch_msi_base = VIRT_PCH_MSI_ADDR_LOW;
+ hwaddr pch_msi_size = VIRT_PCH_MSI_SIZE;
+
+ *pch_msi_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+ nodename = g_strdup_printf("/msi@%" PRIx64, pch_msi_base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_msi_phandle);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "loongson,pch-msi-1.0");
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "reg",
+ 0, pch_msi_base,
+ 0, pch_msi_size);
+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+ *eiointc_phandle);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-base-vec",
+ VIRT_PCH_PIC_IRQ_NUM);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-num-vecs",
+ EXTIOI_IRQS - VIRT_PCH_PIC_IRQ_NUM);
+ g_free(nodename);
+}
+
static void fdt_add_flash_node(LoongArchMachineState *lams)
{
MachineState *ms = MACHINE(lams);
@@ -144,7 +231,8 @@
g_free(nodename);
}
-static void fdt_add_rtc_node(LoongArchMachineState *lams)
+static void fdt_add_rtc_node(LoongArchMachineState *lams,
+ uint32_t *pch_pic_phandle)
{
char *nodename;
hwaddr base = VIRT_RTC_REG_BASE;
@@ -153,12 +241,18 @@
nodename = g_strdup_printf("/rtc@%" PRIx64, base);
qemu_fdt_add_subnode(ms->fdt, nodename);
- qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "loongson,ls7a-rtc");
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "loongson,ls7a-rtc");
qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size);
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
+ VIRT_RTC_IRQ - VIRT_GSI_BASE , 0x4);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+ *pch_pic_phandle);
g_free(nodename);
}
-static void fdt_add_uart_node(LoongArchMachineState *lams)
+static void fdt_add_uart_node(LoongArchMachineState *lams,
+ uint32_t *pch_pic_phandle)
{
char *nodename;
hwaddr base = VIRT_UART_BASE;
@@ -171,6 +265,10 @@
qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size);
qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000);
qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
+ VIRT_UART_IRQ - VIRT_GSI_BASE, 0x4);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+ *pch_pic_phandle);
g_free(nodename);
}
@@ -265,7 +363,62 @@
g_free(nodename);
}
-static void fdt_add_pcie_node(const LoongArchMachineState *lams)
+static void fdt_add_pcie_irq_map_node(const LoongArchMachineState *lams,
+ char *nodename,
+ uint32_t *pch_pic_phandle)
+{
+ int pin, dev;
+ uint32_t irq_map_stride = 0;
+ uint32_t full_irq_map[GPEX_NUM_IRQS *GPEX_NUM_IRQS * 10] = {};
+ uint32_t *irq_map = full_irq_map;
+ const MachineState *ms = MACHINE(lams);
+
+ /* This code creates a standard swizzle of interrupts such that
+ * each device's first interrupt is based on it's PCI_SLOT number.
+ * (See pci_swizzle_map_irq_fn())
+ *
+ * We only need one entry per interrupt in the table (not one per
+ * possible slot) seeing the interrupt-map-mask will allow the table
+ * to wrap to any number of devices.
+ */
+
+ for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
+ int devfn = dev * 0x8;
+
+ for (pin = 0; pin < GPEX_NUM_IRQS; pin++) {
+ int irq_nr = 16 + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
+ int i = 0;
+
+ /* Fill PCI address cells */
+ irq_map[i] = cpu_to_be32(devfn << 8);
+ i += 3;
+
+ /* Fill PCI Interrupt cells */
+ irq_map[i] = cpu_to_be32(pin + 1);
+ i += 1;
+
+ /* Fill interrupt controller phandle and cells */
+ irq_map[i++] = cpu_to_be32(*pch_pic_phandle);
+ irq_map[i++] = cpu_to_be32(irq_nr);
+
+ if (!irq_map_stride) {
+ irq_map_stride = i;
+ }
+ irq_map += irq_map_stride;
+ }
+ }
+
+
+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map,
+ GPEX_NUM_IRQS * GPEX_NUM_IRQS *
+ irq_map_stride * sizeof(uint32_t));
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask",
+ 0x1800, 0, 0, 0x7);
+}
+
+static void fdt_add_pcie_node(const LoongArchMachineState *lams,
+ uint32_t *pch_pic_phandle,
+ uint32_t *pch_msi_phandle)
{
char *nodename;
hwaddr base_mmio = VIRT_PCI_MEM_BASE;
@@ -296,34 +449,11 @@
2, base_pio, 2, size_pio,
1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
2, base_mmio, 2, size_mmio);
- g_free(nodename);
-}
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map",
+ 0, *pch_msi_phandle, 0, 0x10000);
-static void fdt_add_irqchip_node(LoongArchMachineState *lams)
-{
- MachineState *ms = MACHINE(lams);
- char *nodename;
- uint32_t irqchip_phandle;
+ fdt_add_pcie_irq_map_node(lams, nodename, pch_pic_phandle);
- irqchip_phandle = qemu_fdt_alloc_phandle(ms->fdt);
- qemu_fdt_setprop_cell(ms->fdt, "/", "interrupt-parent", irqchip_phandle);
-
- nodename = g_strdup_printf("/intc@%lx", VIRT_IOAPIC_REG_BASE);
- qemu_fdt_add_subnode(ms->fdt, nodename);
- qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 3);
- qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
- qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2);
- qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2);
- qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0);
-
- qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
- "loongarch,ls7a");
-
- qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
- 2, VIRT_IOAPIC_REG_BASE,
- 2, PCH_PIC_ROUTE_ENTRY_OFFSET);
-
- qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", irqchip_phandle);
g_free(nodename);
}
@@ -333,7 +463,7 @@
char *nodename = g_strdup_printf("/memory@%" PRIx64, base);
qemu_fdt_add_subnode(ms->fdt, nodename);
- qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 2, base, 2, size);
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size);
qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory");
if (ms->numa_state && ms->numa_state->num_nodes) {
@@ -386,15 +516,8 @@
acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
}
-struct memmap_entry {
- uint64_t address;
- uint64_t length;
- uint32_t type;
- uint32_t reserved;
-};
-
-static struct memmap_entry *memmap_table;
-static unsigned memmap_entries;
+struct memmap_entry *memmap_table;
+unsigned memmap_entries;
static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
{
@@ -412,31 +535,6 @@
memmap_entries++;
}
-static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
-{
- return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
-}
-
-static int64_t load_kernel_info(const struct loaderparams *loaderparams)
-{
- uint64_t kernel_entry, kernel_low, kernel_high;
- ssize_t kernel_size;
-
- kernel_size = load_elf(loaderparams->kernel_filename, NULL,
- cpu_loongarch_virt_to_phys, NULL,
- &kernel_entry, &kernel_low,
- &kernel_high, NULL, 0,
- EM_LOONGARCH, 1, 0);
-
- if (kernel_size < 0) {
- error_report("could not load kernel '%s': %s",
- loaderparams->kernel_filename,
- load_elf_strerror(kernel_size));
- exit(1);
- }
- return kernel_entry;
-}
-
static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState *lams)
{
DeviceState *dev;
@@ -487,7 +585,10 @@
return dev;
}
-static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *lams)
+static void loongarch_devices_init(DeviceState *pch_pic,
+ LoongArchMachineState *lams,
+ uint32_t *pch_pic_phandle,
+ uint32_t *pch_msi_phandle)
{
MachineClass *mc = MACHINE_GET_CLASS(lams);
DeviceState *gpex_dev;
@@ -533,11 +634,14 @@
gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
}
+ /* Add pcie node */
+ fdt_add_pcie_node(lams, pch_pic_phandle, pch_msi_phandle);
+
serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
qdev_get_gpio_in(pch_pic,
VIRT_UART_IRQ - VIRT_GSI_BASE),
115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
- fdt_add_uart_node(lams);
+ fdt_add_uart_node(lams, pch_pic_phandle);
/* Network init */
pci_init_nic_devices(pci_bus, mc->default_nic);
@@ -550,7 +654,7 @@
sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
qdev_get_gpio_in(pch_pic,
VIRT_RTC_IRQ - VIRT_GSI_BASE));
- fdt_add_rtc_node(lams);
+ fdt_add_rtc_node(lams, pch_pic_phandle);
/* acpi ged */
lams->acpi_ged = create_acpi_ged(pch_pic, lams);
@@ -568,6 +672,7 @@
CPULoongArchState *env;
CPUState *cpu_state;
int cpu, pin, i, start, num;
+ uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
/*
* The connection of interrupts:
@@ -602,6 +707,9 @@
memory_region_add_subregion(&lams->system_iocsr, MAIL_SEND_ADDR,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
+ /* Add cpu interrupt-controller */
+ fdt_add_cpuic_node(lams, &cpuintc_phandle);
+
for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
cpu_state = qemu_get_cpu(cpu);
cpudev = DEVICE(cpu_state);
@@ -633,6 +741,9 @@
}
}
+ /* Add Extend I/O Interrupt Controller node */
+ fdt_add_eiointc_node(lams, &cpuintc_phandle, &eiointc_phandle);
+
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
num = VIRT_PCH_PIC_IRQ_NUM;
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -652,6 +763,9 @@
qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
}
+ /* Add PCH PIC node */
+ fdt_add_pch_pic_node(lams, &eiointc_phandle, &pch_pic_phandle);
+
pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
start = num;
num = EXTIOI_IRQS - start;
@@ -666,7 +780,10 @@
qdev_get_gpio_in(extioi, i + start));
}
- loongarch_devices_init(pch_pic, lams);
+ /* Add PCH MSI node */
+ fdt_add_pch_msi_node(lams, &eiointc_phandle, &pch_msi_phandle);
+
+ loongarch_devices_init(pch_pic, lams, &pch_pic_phandle, &pch_msi_phandle);
}
static void loongarch_firmware_init(LoongArchMachineState *lams)
@@ -717,67 +834,6 @@
}
}
-static void reset_load_elf(void *opaque)
-{
- LoongArchCPU *cpu = opaque;
- CPULoongArchState *env = &cpu->env;
-
- cpu_reset(CPU(cpu));
- if (env->load_elf) {
- cpu_set_pc(CPU(cpu), env->elf_address);
- }
-}
-
-static void fw_cfg_add_kernel_info(const struct loaderparams *loaderparams,
- FWCfgState *fw_cfg)
-{
- /*
- * Expose the kernel, the command line, and the initrd in fw_cfg.
- * We don't process them here at all, it's all left to the
- * firmware.
- */
- load_image_to_fw_cfg(fw_cfg,
- FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
- loaderparams->kernel_filename,
- false);
-
- if (loaderparams->initrd_filename) {
- load_image_to_fw_cfg(fw_cfg,
- FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
- loaderparams->initrd_filename, false);
- }
-
- if (loaderparams->kernel_cmdline) {
- fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
- strlen(loaderparams->kernel_cmdline) + 1);
- fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
- loaderparams->kernel_cmdline);
- }
-}
-
-static void loongarch_firmware_boot(LoongArchMachineState *lams,
- const struct loaderparams *loaderparams)
-{
- fw_cfg_add_kernel_info(loaderparams, lams->fw_cfg);
-}
-
-static void loongarch_direct_kernel_boot(LoongArchMachineState *lams,
- const struct loaderparams *loaderparams)
-{
- MachineState *machine = MACHINE(lams);
- int64_t kernel_addr = 0;
- LoongArchCPU *lacpu;
- int i;
-
- kernel_addr = load_kernel_info(loaderparams);
- if (!machine->firmware) {
- for (i = 0; i < machine->smp.cpus; i++) {
- lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
- lacpu->env.load_elf = true;
- lacpu->env.elf_address = kernel_addr;
- }
- }
-}
static void loongarch_qemu_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
@@ -828,12 +884,10 @@
int nb_numa_nodes = machine->numa_state->num_nodes;
NodeInfo *numa_info = machine->numa_state->nodes;
int i;
- hwaddr fdt_base;
const CPUArchIdList *possible_cpus;
MachineClass *mc = MACHINE_GET_CLASS(machine);
CPUState *cpu;
char *ramName = NULL;
- struct loaderparams loaderparams = { };
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -936,28 +990,11 @@
sizeof(struct memmap_entry) * (memmap_entries));
}
fdt_add_fw_cfg_node(lams);
- loaderparams.ram_size = ram_size;
- loaderparams.kernel_filename = machine->kernel_filename;
- loaderparams.kernel_cmdline = machine->kernel_cmdline;
- loaderparams.initrd_filename = machine->initrd_filename;
- /* load the kernel. */
- if (loaderparams.kernel_filename) {
- if (lams->bios_loaded) {
- loongarch_firmware_boot(lams, &loaderparams);
- } else {
- loongarch_direct_kernel_boot(lams, &loaderparams);
- }
- }
fdt_add_flash_node(lams);
- /* register reset function */
- for (i = 0; i < machine->smp.cpus; i++) {
- lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
- qemu_register_reset(reset_load_elf, lacpu);
- }
+
/* Initialize the IO interrupt subsystem */
loongarch_irq_init(lams);
- fdt_add_irqchip_node(lams);
- platform_bus_add_all_fdt_nodes(machine->fdt, "/intc",
+ platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
VIRT_PLATFORM_BUS_BASEADDRESS,
VIRT_PLATFORM_BUS_SIZE,
VIRT_PLATFORM_BUS_IRQ);
@@ -967,7 +1004,6 @@
lams->powerdown_notifier.notify = virt_powerdown_req;
qemu_register_powerdown_notifier(&lams->powerdown_notifier);
- fdt_add_pcie_node(lams);
/*
* Since lowmem region starts from 0 and Linux kernel legacy start address
* at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
@@ -975,9 +1011,14 @@
* Put the FDT into the memory map as a ROM image: this will ensure
* the FDT is copied again upon reset, even if addr points into RAM.
*/
- fdt_base = 1 * MiB;
qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
- rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
+ rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, FDT_BASE,
+ &address_space_memory);
+ qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+ rom_ptr_for_as(&address_space_memory, FDT_BASE, lams->fdt_size));
+
+ lams->bootinfo.ram_size = ram_size;
+ loongarch_load_kernel(machine, &lams->bootinfo);
}
bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 2a976ca..fa052c4 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "qemu/units.h"
#include "hw/pci/pci.h"
#include "hw/hw.h"
@@ -103,25 +104,25 @@
}
}
-static bool within(uint64_t addr, uint64_t start, uint64_t end)
+static void edu_check_range(uint64_t xfer_start, uint64_t xfer_size,
+ uint64_t dma_start, uint64_t dma_size)
{
- return start <= addr && addr < end;
-}
+ uint64_t xfer_end = xfer_start + xfer_size;
+ uint64_t dma_end = dma_start + dma_size;
-static void edu_check_range(uint64_t addr, uint64_t size1, uint64_t start,
- uint64_t size2)
-{
- uint64_t end1 = addr + size1;
- uint64_t end2 = start + size2;
-
- if (within(addr, start, end2) &&
- end1 > addr && end1 <= end2) {
+ /*
+ * 1. ensure we aren't overflowing
+ * 2. ensure that xfer is within dma address range
+ */
+ if (dma_end >= dma_start && xfer_end >= xfer_start &&
+ xfer_start >= dma_start && xfer_end <= dma_end) {
return;
}
- hw_error("EDU: DMA range 0x%016"PRIx64"-0x%016"PRIx64
- " out of bounds (0x%016"PRIx64"-0x%016"PRIx64")!",
- addr, end1 - 1, start, end2 - 1);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "EDU: DMA range 0x%016"PRIx64"-0x%016"PRIx64
+ " out of bounds (0x%016"PRIx64"-0x%016"PRIx64")!",
+ xfer_start, xfer_end - 1, dma_start, dma_end - 1);
}
static dma_addr_t edu_clamp_addr(const EduState *edu, dma_addr_t addr)
@@ -129,7 +130,9 @@
dma_addr_t res = addr & edu->dma_mask;
if (addr != res) {
- printf("EDU: clamping DMA %#.16"PRIx64" to %#.16"PRIx64"!\n", addr, res);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "EDU: clamping DMA 0x%016"PRIx64" to 0x%016"PRIx64"!",
+ addr, res);
}
return res;
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index a0a46b8..410c6e1 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -39,6 +39,7 @@
#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
+#define EXTIOI_SIZE 0x800
typedef struct ExtIOICore {
uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
new file mode 100644
index 0000000..4ebcc89
--- /dev/null
+++ b/include/hw/loongarch/boot.h
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Definitions for LoongArch boot.
+ *
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_BOOT_H
+#define HW_LOONGARCH_BOOT_H
+
+/* UEFI 2.10 */
+#define EFI_SYSTEM_TABLE_SIGNATURE 0x5453595320494249
+#define EFI_2_100_SYSTEM_TABLE_REVISION ((2<<16) | (100))
+#define EFI_SPECIFICATION_VERSION EFI_SYSTEM_TABLE_REVISION
+#define EFI_SYSTEM_TABLE_REVISION EFI_2_100_SYSTEM_TABLE_REVISION
+
+#define FW_VERSION 0x1
+#define FW_PATCHLEVEL 0x0
+
+typedef struct {
+ uint8_t b[16];
+} efi_guid_t QEMU_ALIGNED(8);
+
+#define EFI_GUID(a, b, c, d...) (efi_guid_t){ { \
+ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
+ (b) & 0xff, ((b) >> 8) & 0xff, \
+ (c) & 0xff, ((c) >> 8) & 0xff, d } }
+
+#define LINUX_EFI_BOOT_MEMMAP_GUID \
+ EFI_GUID(0x800f683f, 0xd08b, 0x423a, 0xa2, 0x93, \
+ 0x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
+
+#define LINUX_EFI_INITRD_MEDIA_GUID \
+ EFI_GUID(0x5568e427, 0x68fc, 0x4f3d, 0xac, 0x74, \
+ 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
+
+#define DEVICE_TREE_GUID \
+ EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, \
+ 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0)
+
+struct efi_config_table {
+ efi_guid_t guid;
+ uint64_t *ptr;
+ const char name[16];
+};
+
+typedef struct {
+ uint64_t signature;
+ uint32_t revision;
+ uint32_t headersize;
+ uint32_t crc32;
+ uint32_t reserved;
+} efi_table_hdr_t;
+
+struct efi_configuration_table {
+ efi_guid_t guid;
+ void *table;
+};
+
+struct efi_system_table {
+ efi_table_hdr_t hdr;
+ uint64_t fw_vendor; /* physical addr of CHAR16 vendor string */
+ uint32_t fw_revision;
+ uint64_t con_in_handle;
+ uint64_t *con_in;
+ uint64_t con_out_handle;
+ uint64_t *con_out;
+ uint64_t stderr_handle;
+ uint64_t stderr_placeholder;
+ uint64_t *runtime;
+ uint64_t *boottime;
+ uint64_t nr_tables;
+ struct efi_configuration_table *tables;
+};
+
+typedef struct {
+ uint32_t type;
+ uint32_t pad;
+ uint64_t phys_addr;
+ uint64_t virt_addr;
+ uint64_t num_pages;
+ uint64_t attribute;
+} efi_memory_desc_t;
+
+struct efi_boot_memmap {
+ uint64_t map_size;
+ uint64_t desc_size;
+ uint32_t desc_ver;
+ uint64_t map_key;
+ uint64_t buff_size;
+ efi_memory_desc_t map[32];
+};
+
+struct efi_initrd {
+ uint64_t base;
+ uint64_t size;
+};
+
+struct loongarch_boot_info {
+ uint64_t ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+ uint64_t a0, a1, a2;
+};
+
+void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info);
+
+#endif /* HW_LOONGARCH_BOOT_H */
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 252f7df..4e14bf6 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -13,6 +13,7 @@
#include "qemu/queue.h"
#include "hw/intc/loongarch_ipi.h"
#include "hw/block/flash.h"
+#include "hw/loongarch/boot.h"
#define LOONGARCH_MAX_CPUS 256
@@ -32,6 +33,20 @@
#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
+#define COMMAND_LINE_SIZE 512
+
+#define FDT_BASE 0x100000
+
+extern struct memmap_entry *memmap_table;
+extern unsigned memmap_entries;
+
+struct memmap_entry {
+ uint64_t address;
+ uint64_t length;
+ uint32_t type;
+ uint32_t reserved;
+};
+
struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
@@ -55,6 +70,7 @@
MemoryRegion system_iocsr;
MemoryRegion iocsr_mem;
AddressSpace as_iocsr;
+ struct loongarch_boot_info bootinfo;
};
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index e753449..cd7c9ec 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -24,6 +24,8 @@
#define VIRT_PCH_REG_BASE 0x10000000UL
#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
+#define VIRT_PCH_REG_SIZE 0x400
+#define VIRT_PCH_MSI_SIZE 0x8
/*
* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
diff --git a/qga/meson.build b/qga/meson.build
index 1c3d2a3..46c1d83 100644
--- a/qga/meson.build
+++ b/qga/meson.build
@@ -181,12 +181,11 @@
test_env.set('G_TEST_SRCDIR', meson.current_source_dir())
test_env.set('G_TEST_BUILDDIR', meson.current_build_dir())
-# disable qga-ssh-test for now. glib's G_TEST_OPTION_ISOLATE_DIRS triggers
+# disable qga-ssh-test with fuzzing: glib's G_TEST_OPTION_ISOLATE_DIRS triggers
# the leak detector in build-oss-fuzz Gitlab CI test. we should re-enable
# this when an alternative is implemented or when the underlying glib
# issue is identified/fix
-#if host_os != 'windows'
-if false
+if host_os != 'windows' and not get_option('fuzzing')
srcs = [files('commands-posix-ssh.c')]
i = 0
foreach output: qga_qapi_outputs
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 7026895..ff373a7 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -435,8 +435,8 @@
my @patches;
my %git_commits = ();
my $HASH;
- open($HASH, "-|", "git", "log", "--reverse", "--no-merges", "--format=%H %s", $ARGV[0]) ||
- die "$P: git log --reverse --no-merges --format='%H %s' $ARGV[0] failed - $!\n";
+ open($HASH, "-|", "git", "log", "--reverse", "--no-merges", "--no-mailmap", "--format=%H %s", $ARGV[0]) ||
+ die "$P: git log --reverse --no-merges --no-mailmap --format='%H %s' $ARGV[0] failed - $!\n";
for my $line (<$HASH>) {
$line =~ /^([0-9a-fA-F]{40,40}) (.*)$/;
@@ -460,7 +460,7 @@
"-c", "diff.renamelimit=0",
"-c", "diff.renames=True",
"-c", "diff.algorithm=histogram",
- "show",
+ "show", "--no-mailmap",
"--patch-with-stat", $hash) ||
die "$P: git show $hash - $!\n";
while (<$FILE>) {
@@ -1573,7 +1573,7 @@
$is_patch = 1;
}
- if ($line =~ /^(Author|From): .* via .*<qemu-devel\@nongnu.org>/) {
+ if ($line =~ /^(Author|From): .* via .*<qemu-\w+\@nongnu\.org>/) {
ERROR("Author email address is mangled by the mailing list\n" . $herecurr);
}
@@ -3078,6 +3078,9 @@
if ($line =~ /\b(g_)?assert\(0\)/) {
ERROR("use g_assert_not_reached() instead of assert(0)\n" . $herecurr);
}
+ if ($line =~ /\bstrerrorname_np\(/) {
+ ERROR("use strerror() instead of strerrorname_np()\n" . $herecurr);
+ }
my $non_exit_glib_asserts = qr{g_assert_cmpstr|
g_assert_cmpint|
g_assert_cmpuint|
diff --git a/scripts/ci/setup/build-environment.yml b/scripts/ci/setup/build-environment.yml
index f344d1a..de0d866 100644
--- a/scripts/ci/setup/build-environment.yml
+++ b/scripts/ci/setup/build-environment.yml
@@ -95,7 +95,6 @@
- libpam0g-dev
- libpcre2-dev
- libpixman-1-dev
- - libpmem-dev
- libpng-dev
- libpulse-dev
- librbd-dev
@@ -107,7 +106,6 @@
- libslirp-dev
- libsnappy-dev
- libspice-protocol-dev
- - libspice-server-dev
- libssh-dev
- libsystemd-dev
- libtasn1-6-dev
@@ -119,7 +117,6 @@
- libvdeplug-dev
- libvirglrenderer-dev
- libvte-2.91-dev
- - libxen-dev
- libxml2-dev
- libzstd-dev
- llvm
@@ -156,6 +153,19 @@
- ansible_facts['distribution'] == 'Ubuntu'
- ansible_facts['distribution_version'] == '22.04'
+ # not all packages are available for all architectures
+ - name: Install additional packages to build QEMU on Ubuntu 22.04
+ package:
+ name:
+ - libpmem-dev
+ - libspice-server-dev
+ - libxen-dev
+ state: present
+ when:
+ - ansible_facts['distribution'] == 'Ubuntu'
+ - ansible_facts['distribution_version'] == '22.04'
+ - ansible_facts['architecture'] == 'aarch64' or ansible_facts['architecture'] == 'x86_64'
+
- name: Install armhf cross-compile packages to build QEMU on AArch64 Ubuntu 22.04
package:
name:
diff --git a/stubs/meson.build b/stubs/meson.build
index 8ee1fd5..3b9d420 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -21,12 +21,12 @@
stub_ss.add(files('migr-blocker.c'))
stub_ss.add(files('physmem.c'))
stub_ss.add(files('ram-block.c'))
- stub_ss.add(files('replay-tools.c'))
stub_ss.add(files('runstate-check.c'))
stub_ss.add(files('uuid.c'))
endif
if have_block or have_ga
+ stub_ss.add(files('replay-tools.c'))
# stubs for hooks in util/main-loop.c, util/async.c etc.
stub_ss.add(files('cpus-get-virtual-clock.c'))
stub_ss.add(files('icount.c'))
@@ -45,6 +45,10 @@
stub_ss.add(files('qmp-quit.c'))
endif
+if have_ga
+ stub_ss.add(files('error-printf.c'))
+endif
+
if have_block or have_user
stub_ss.add(files('qtest.c'))
stub_ss.add(files('vm-stop.c'))
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index fa1ea37..aa3b2d8 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5708,7 +5708,7 @@
desc = g_strdup_printf("%s (deprecated)", olddesc);
}
- qemu_printf("x86 %-20s %s\n", name, desc);
+ qemu_printf(" %-20s %s\n", name, desc);
}
/* list available CPU models and flags */
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index bac84dc..1ebba04 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -92,7 +92,7 @@
{
CPUState *cs = env_cpu(env);
- qemu_log_mask(CPU_LOG_INT, "%s: expection: %d (%s)\n",
+ qemu_log_mask(CPU_LOG_INT, "%s: exception: %d (%s)\n",
__func__,
exception,
loongarch_exception_name(exception));
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index abb01b2..c572267 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -359,6 +359,8 @@
uint32_t mp_state;
/* Store ipistate to access from this struct */
DeviceState *ipistate;
+
+ struct loongarch_boot_info *boot_info;
#endif
} CPULoongArchState;
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 6d82f24..c11a69f 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7063,7 +7063,7 @@
}
name = cpu_model_from_type(typename);
- qemu_printf("PowerPC %-16s PVR %08x\n", name, pcc->pvr);
+ qemu_printf(" %-16s PVR %08x\n", name, pcc->pvr);
for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {
PowerPCCPUAlias *alias = &ppc_cpu_aliases[i];
ObjectClass *alias_oc = ppc_cpu_class_by_name(alias->model);
@@ -7076,10 +7076,10 @@
* avoid printing the wrong alias here and use "preferred" instead
*/
if (strcmp(alias->alias, family->desc) == 0) {
- qemu_printf("PowerPC %-16s (alias for preferred %s CPU)\n",
+ qemu_printf(" %-16s (alias for preferred %s CPU)\n",
alias->alias, family->desc);
} else {
- qemu_printf("PowerPC %-16s (alias for %s)\n",
+ qemu_printf(" %-16s (alias for %s)\n",
alias->alias, name);
}
}
@@ -7090,6 +7090,7 @@
{
GSList *list;
+ qemu_printf("Available CPUs:\n");
list = object_class_get_list(TYPE_POWERPC_CPU, false);
list = g_slist_sort(list, ppc_cpu_list_compare);
g_slist_foreach(list, ppc_cpu_list_entry, NULL);
@@ -7097,7 +7098,7 @@
#ifdef CONFIG_KVM
qemu_printf("\n");
- qemu_printf("PowerPC %s\n", "host");
+ qemu_printf(" %s\n", "host");
#endif
}
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 49d2f3a..eaa3612 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1054,8 +1054,8 @@
ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
if (ret != 0) {
- error_report("Unable to read vlenb register, error code: %s",
- strerrorname_np(errno));
+ error_report("Unable to read vlenb register, error code: %d",
+ errno);
exit(EXIT_FAILURE);
}
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 8ed3bb6..efb508c 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -355,9 +355,9 @@
/* strip off the -s390x-cpu */
g_strrstr(name, "-" TYPE_S390_CPU)[0] = 0;
if (details->len) {
- qemu_printf("s390 %-15s %-35s (%s)\n", name, scc->desc, details->str);
+ qemu_printf(" %-15s %-35s (%s)\n", name, scc->desc, details->str);
} else {
- qemu_printf("s390 %-15s %-35s\n", name, scc->desc);
+ qemu_printf(" %-15s %-35s\n", name, scc->desc);
}
g_free(name);
}
@@ -402,6 +402,7 @@
S390Feat feat;
GSList *list;
+ qemu_printf("Available CPUs:\n");
list = object_class_get_list(TYPE_S390_CPU, false);
list = g_slist_sort(list, s390_cpu_list_compare);
g_slist_foreach(list, s390_print_cpu_model_list_entry, NULL);
@@ -411,14 +412,14 @@
for (feat = 0; feat < S390_FEAT_MAX; feat++) {
const S390FeatDef *def = s390_feat_def(feat);
- qemu_printf("%-20s %s\n", def->name, def->desc);
+ qemu_printf(" %-20s %s\n", def->name, def->desc);
}
qemu_printf("\nRecognized feature groups:\n");
for (group = 0; group < S390_FEAT_GROUP_MAX; group++) {
const S390FeatGroupDef *def = s390_feat_group_def(group);
- qemu_printf("%-20s %s\n", def->name, def->desc);
+ qemu_printf(" %-20s %s\n", def->name, def->desc);
}
}
@@ -510,7 +511,7 @@
return;
}
-static void check_compatibility(const S390CPUModel *max_model,
+static bool check_compatibility(const S390CPUModel *max_model,
const S390CPUModel *model, Error **errp)
{
ERRP_GUARD();
@@ -518,11 +519,11 @@
if (model->def->gen > max_model->def->gen) {
check_compat_model_failed(errp, max_model, "Selected CPU generation is too new");
- return;
+ return false;
} else if (model->def->gen == max_model->def->gen &&
model->def->ec_ga > max_model->def->ec_ga) {
check_compat_model_failed(errp, max_model, "Selected CPU GA level is too new");
- return;
+ return false;
}
#ifndef CONFIG_USER_ONLY
@@ -530,14 +531,14 @@
error_setg(errp, "The unpack facility is not compatible with "
"the --only-migratable option. You must remove either "
"the 'unpack' facility or the --only-migratable option");
- return;
+ return false;
}
#endif
/* detect the missing features to properly report them */
bitmap_andnot(missing, model->features, max_model->features, S390_FEAT_MAX);
if (bitmap_empty(missing, S390_FEAT_MAX)) {
- return;
+ return true;
}
error_setg(errp, " ");
@@ -546,11 +547,11 @@
"available in the current configuration: ");
error_append_hint(errp,
"Consider a different accelerator, QEMU, or kernel version\n");
+ return false;
}
S390CPUModel *get_max_cpu_model(Error **errp)
{
- Error *err = NULL;
static S390CPUModel max_model;
static bool cached;
@@ -559,16 +560,14 @@
}
if (kvm_enabled()) {
- kvm_s390_get_host_cpu_model(&max_model, &err);
+ if (!kvm_s390_get_host_cpu_model(&max_model, errp)) {
+ return NULL;
+ }
} else {
max_model.def = s390_find_cpu_def(QEMU_MAX_CPU_TYPE, QEMU_MAX_CPU_GEN,
QEMU_MAX_CPU_EC_GA, NULL);
bitmap_copy(max_model.features, qemu_max_cpu_feat, S390_FEAT_MAX);
}
- if (err) {
- error_propagate(errp, err);
- return NULL;
- }
cached = true;
return &max_model;
}
@@ -576,7 +575,6 @@
void s390_realize_cpu_model(CPUState *cs, Error **errp)
{
ERRP_GUARD();
- Error *err = NULL;
S390CPUClass *xcc = S390_CPU_GET_CLASS(cs);
S390CPU *cpu = S390_CPU(cs);
const S390CPUModel *max_model;
@@ -605,9 +603,7 @@
cpu->model->cpu_ver = max_model->cpu_ver;
check_consistency(cpu->model);
- check_compatibility(max_model, cpu->model, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!check_compatibility(max_model, cpu->model, errp)) {
return;
}
diff --git a/target/s390x/cpu_models.h b/target/s390x/cpu_models.h
index a89c2a1..71d4bc2 100644
--- a/target/s390x/cpu_models.h
+++ b/target/s390x/cpu_models.h
@@ -115,7 +115,7 @@
S390FeatBitmap features);
bool kvm_s390_cpu_models_supported(void);
-void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp);
-void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp);
+bool kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp);
+bool kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp);
#endif /* TARGET_S390X_CPU_MODELS_H */
diff --git a/target/s390x/cpu_models_sysemu.c b/target/s390x/cpu_models_sysemu.c
index 2d99218..15be729 100644
--- a/target/s390x/cpu_models_sysemu.c
+++ b/target/s390x/cpu_models_sysemu.c
@@ -389,7 +389,6 @@
void apply_cpu_model(const S390CPUModel *model, Error **errp)
{
- Error *err = NULL;
static S390CPUModel applied_model;
static bool applied;
@@ -405,9 +404,7 @@
}
if (kvm_enabled()) {
- kvm_s390_apply_cpu_model(model, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!kvm_s390_apply_cpu_model(model, errp)) {
return;
}
}
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 4dcd757..1b494ec 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm.c
@@ -2375,7 +2375,7 @@
KVM_S390_VM_CPU_MACHINE_SUBFUNC);
}
-void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp)
+bool kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp)
{
struct kvm_s390_vm_cpu_machine prop = {};
struct kvm_device_attr attr = {
@@ -2390,14 +2390,14 @@
if (!kvm_s390_cpu_models_supported()) {
error_setg(errp, "KVM doesn't support CPU models");
- return;
+ return false;
}
/* query the basic cpu model properties */
rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr);
if (rc) {
error_setg(errp, "KVM: Error querying host CPU model: %d", rc);
- return;
+ return false;
}
cpu_type = cpuid_type(prop.cpuid);
@@ -2420,13 +2420,13 @@
rc = query_cpu_feat(model->features);
if (rc) {
error_setg(errp, "KVM: Error querying CPU features: %d", rc);
- return;
+ return false;
}
/* get supported cpu subfunctions indicated via query / test bit */
rc = query_cpu_subfunc(model->features);
if (rc) {
error_setg(errp, "KVM: Error querying CPU subfunctions: %d", rc);
- return;
+ return false;
}
/* PTFF subfunctions might be indicated although kernel support missing */
@@ -2482,7 +2482,7 @@
}
if (!model->def) {
error_setg(errp, "KVM: host CPU model could not be identified");
- return;
+ return false;
}
/* for now, we can only provide the AP feature with HW support */
if (ap_available()) {
@@ -2506,6 +2506,7 @@
/* strip of features that are not part of the maximum model */
bitmap_and(model->features, model->features, model->def->full_feat,
S390_FEAT_MAX);
+ return true;
}
static int configure_uv_feat_guest(const S390FeatBitmap features)
@@ -2542,7 +2543,7 @@
}
}
-void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp)
+bool kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp)
{
struct kvm_s390_vm_cpu_processor prop = {
.fac_list = { 0 },
@@ -2559,11 +2560,11 @@
if (kvm_s390_cmma_available()) {
kvm_s390_enable_cmma();
}
- return;
+ return true;
}
if (!kvm_s390_cpu_models_supported()) {
error_setg(errp, "KVM doesn't support CPU models");
- return;
+ return false;
}
prop.cpuid = s390_cpuid_from_cpu_model(model);
prop.ibc = s390_ibc_from_cpu_model(model);
@@ -2573,19 +2574,19 @@
rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr);
if (rc) {
error_setg(errp, "KVM: Error configuring the CPU model: %d", rc);
- return;
+ return false;
}
/* configure cpu features indicated e.g. via SCLP */
rc = configure_cpu_feat(model->features);
if (rc) {
error_setg(errp, "KVM: Error configuring CPU features: %d", rc);
- return;
+ return false;
}
/* configure cpu subfunctions indicated via query / test bit */
rc = configure_cpu_subfunc(model->features);
if (rc) {
error_setg(errp, "KVM: Error configuring CPU subfunctions: %d", rc);
- return;
+ return false;
}
/* enable CMM via CMMA */
if (test_bit(S390_FEAT_CMM, model->features)) {
@@ -2600,8 +2601,9 @@
rc = configure_uv_feat_guest(model->features);
if (rc) {
error_setg(errp, "KVM: Error configuring CPU UV features %d", rc);
- return;
+ return false;
}
+ return true;
}
void kvm_s390_restart_interrupt(S390CPU *cpu)
diff --git a/tests/qtest/ide-test.c b/tests/qtest/ide-test.c
index d6b4f6e..90ba6b2 100644
--- a/tests/qtest/ide-test.c
+++ b/tests/qtest/ide-test.c
@@ -34,7 +34,8 @@
#include "hw/pci/pci_ids.h"
#include "hw/pci/pci_regs.h"
-#define TEST_IMAGE_SIZE 64 * 1024 * 1024
+/* Specified by ATA (physical) CHS geometry for ~64 MiB device. */
+#define TEST_IMAGE_SIZE ((130 * 16 * 63) * 512)
#define IDE_PCI_DEV 1
#define IDE_PCI_FUNC 1
@@ -88,11 +89,13 @@
enum {
CMD_DSM = 0x06,
CMD_DIAGNOSE = 0x90,
+ CMD_INIT_DP = 0x91, /* INITIALIZE DEVICE PARAMETERS */
CMD_READ_DMA = 0xc8,
CMD_WRITE_DMA = 0xca,
CMD_FLUSH_CACHE = 0xe7,
CMD_IDENTIFY = 0xec,
CMD_PACKET = 0xa0,
+ CMD_READ_NATIVE = 0xf8, /* READ NATIVE MAX ADDRESS */
CMDF_ABORT = 0x100,
CMDF_NO_BM = 0x200,
@@ -560,6 +563,46 @@
}
}
+static void test_specify(void)
+{
+ QTestState *qts;
+ QPCIDevice *dev;
+ QPCIBar bmdma_bar, ide_bar;
+ uint16_t cyls;
+ uint8_t heads, spt;
+
+ qts = ide_test_start(
+ "-blockdev driver=file,node-name=hda,filename=%s "
+ "-device ide-hd,drive=hda,bus=ide.0,unit=0 ",
+ tmp_path[0]);
+
+ dev = get_pci_device(qts, &bmdma_bar, &ide_bar);
+
+ /* Initialize drive with zero sectors per track and one head. */
+ qpci_io_writeb(dev, ide_bar, reg_nsectors, 0);
+ qpci_io_writeb(dev, ide_bar, reg_device, 0);
+ qpci_io_writeb(dev, ide_bar, reg_command, CMD_INIT_DP);
+
+ /* READ NATIVE MAX ADDRESS (CHS mode). */
+ qpci_io_writeb(dev, ide_bar, reg_device, 0xa0);
+ qpci_io_writeb(dev, ide_bar, reg_command, CMD_READ_NATIVE);
+
+ heads = qpci_io_readb(dev, ide_bar, reg_device) & 0xf;
+ ++heads;
+ g_assert_cmpint(heads, ==, 16);
+
+ cyls = qpci_io_readb(dev, ide_bar, reg_lba_high) << 8;
+ cyls |= qpci_io_readb(dev, ide_bar, reg_lba_middle);
+ ++cyls;
+ g_assert_cmpint(cyls, ==, 130);
+
+ spt = qpci_io_readb(dev, ide_bar, reg_lba_low);
+ g_assert_cmpint(spt, ==, 63);
+
+ ide_test_quit(qts);
+ free_pci_device(dev);
+}
+
static void test_identify(void)
{
QTestState *qts;
@@ -1077,6 +1120,8 @@
/* Run the tests */
g_test_init(&argc, &argv, NULL);
+ qtest_add_func("/ide/read_native", test_specify);
+
qtest_add_func("/ide/identify", test_identify);
qtest_add_func("/ide/diagnostic", test_diagnostic);
